Investigation of the Determining Factors for the “Mobility Boost” in High‐k‐Gated Transparent Oxide Semiconductor Thin‐Film Transistors

Abstract

TFTs with solution-processed TOS channels generally demonstrate mobility of an order of magnitude higher than a-Si, [6,7] and one common practice to achieve these high-performance TFTs is to use high-k dielectric materials as the gate insulator instead of SiO 2. [8][9][10][11] For example, Xu et al. reported nearly a 10× or 25× increase in the mobility of solution-processed In 2 O 3 or indium-zinc-oxide, respectively, by changing the gate dielectric material from SiO 2 to AlO x . [10] A good amount of similar empirical data can be found in the literature, [12][13][14][15] some examples of which are summarized in Table S1 (Supporting Information). However, despite the wide range of TOS and high-k materials being explored, there is currently no well-established explanation for the phenomenon of higher mobility in oxide TFTs that have high-k gate dielectrics. With a better understanding of the interactions of materials that enhance electron transport, the semiconductor-gate dielectric interface can be engineered to take full advantage of metal-oxide semiconductors for highperformance electronics.Various theories have been proposed to explain the boost in mobility observed in TOS/high-k devices, such as an increase in carrier concentration that fills localized states and allows bandlike transport, [8] reduced trap density at the semiconductor-dielectric interface, [16] electron donation from the gate dielectric, [17] and defect relaxation and suppression of free carriers resulting from diffusion of material from the gate dielectric to the semiconductor. [18] However, so far, only a small number of studies have been focused on explaining the fundamental mechanism behind these observations. In one such study, an analytical model was developed illustrating that field-effect mobility increases with higher gate-insulator capacitance. [19] However, the experimental verification of their model relied on devices with spin-coated HfLaO x as the gate dielectric, which may not properly account for any mobility effects seen in other more common high-k dielectrics (i.e., ZrO 2 or HfO 2 ). Furthermore, a model based on a solution-processed dielectric material is unlikely to be generalizable to explain the mobility dependence for the more commonly used vacuum-deposited dielectric materials because they tend to exhibit greater electronic disorder and nonideal insulating behavior. [20] Their incorporation into transistors has been complicated by defects such as fixed charges, electron traps, and mobile ions. [10] As shown in In metal-oxide thin-film transistors (TFTs), high-k gate dielectrics often yield a higher electron mobility than SiO 2 . However, investigations regarding the mechanism of this high-k "mobility boost" are relatively scarce. To explore this phenomenon, solution-processed In 2 O 3 TFTs are fabricated using eight different gate dielectrics (SiO 2 , Al 2 O 3 , ZrO 2 , HfO 2 , and bilayer SiO 2 /high-k structures). With these structures, the total gate capacitance can be varied independently from the semiconductor-die...

Influence of Thermal Postdeposition on Trap States in Sol–Gel Indium–Zinc Oxide TFTs

“…We assume T exp =150 K for all cases considered in this work [16], [25]. We associate the exponential tail states with the semiconductor bulk [16], [25], [26] and we tentatively associate the delta function DoS with the semiconductordielectric interface [27]. Both types of localized states in our model are assumed to be acceptor-like states, in the sense that they are (negatively) charged when occupied by an electron and neutral when unoccupied.…”

Influence of Thermal Post-deposition on Trap States in Sol-gel Indium Zinc Oxide TFTs

“…We assume T exp =150 K for all our model fits, unless stated otherwise [31], [39]. We associate the exponential tail states with the semiconductor bulk [31], [39]- [41] and we tentatively associate the delta function DoS with the semiconductor-dielectric interface [42].…”

Application of a microwave synthesized ultra-smooth a-C thin film for the reduction of dielectric/semiconductor interface trap states of an oxide thin film transistor

“…4 However, in the fabrication of high-performance TFTs using these high-k gate dielectrics, semiconductor/dielectric interface trap states play a crucial role. 5 In particular for high-k dielectric-based metal-oxide TFTs, the device performance is highly affected by the scattering of carriers at the interface due to the surface roughness and high polarity constituents. 5,6 Furthermore, the imperfect interface of the dielectric/semiconductors creates a significant amount of charge trapping that effectively reduces the carrier mobility of the device.…”

“…5 In particular for high-k dielectric-based metal-oxide TFTs, the device performance is highly affected by the scattering of carriers at the interface due to the surface roughness and high polarity constituents. 5,6 Furthermore, the imperfect interface of the dielectric/semiconductors creates a significant amount of charge trapping that effectively reduces the carrier mobility of the device. 6,7 To resolve this critical issue, various interface modification methods, such as the use of bilayer and multilayer dielectric stacks, [8][9][10][11] the use of an electron injecting layer in between the gate dielectric/gate electrode interface, [12][13][14][15][16] utilization of self-assembled monolayers (SAMs) for interface modification, 17,18 and so on, have been implemented.…”