Investigation of Recovery Phenomena in Hf0.5Zr0.5O2-Based 1T1C FeRAM

Okuno, Junko; Yonai, Tsubasa; Kunihiro, Takafumi; Shuto, Yusuke; Alcala, Ruben; Lederer, Maximilian; Seidel, Konrad; Mikolajick, Thomas; Schroeder, Uwe; Tsukamoto, Masanori; Umebayashi, Taku

doi:10.1109/jeds.2022.3230402

Cited by 4 publications

(1 citation statement)

References 19 publications

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“…One such approach is the development of novel devices, with new types of memories being a critical direction. Hafnium-based ferroelectric memory stands out as a promising candidate among these emerging memory technologies [1][2][3][4][5][6][7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Methodology for Testing Key Parameters of Array-Level Small-Area Hafnium-Based Ferroelectric Capacitors Using Time-to-Digital Converter and Capacitance Calibration Circuits

Zhang,

Yang,

Cao

et al. 2023

Micromachines

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Hafnium-based ferroelectric memories are a promising approach to enhancing integrated circuit performance, offering advantages such as miniaturization, compatibility with CMOS technology, fast read and write speeds, non-volatility, and low power consumption. However, FeRAM (Ferroelectric Random Access Memory) still faces challenges related to endurance and retention susceptibility to process variations. Hence, testing and obtaining the core parameters of ferroelectric capacitors continuously is essential to investigate these phenomena and explore the potential solution. The traditional method for measuring ferroelectric capacitors has limitations in timing generation capability, introduces parasitic capacitance, and lacks accuracy for small-area capacitors. In this study, we analyzed the working principle of ferroelectric capacitors and designed a method to detect the remnant polarization, saturation polarization, and imprint offset of ferroelectric capacitors. Further, we further proposed a circuit implementation method. The proposed test circuit conquers these limitations and enables high-precision testing of ferroelectric capacitors, contributing to developing hafnium-based ferroelectric memories. The circuit includes a flip-readout circuit, a capacitance calibration circuit, and a voltage-to-time converter and time-to-digital converter (VTC&TDC) readout circuit. According to simulation results, the capacitance calibration circuit reduces the deviation of the capacitance by 84%, and the accuracy of the readout circuit is 5.91 bits, with a readout time of 150 ns and a power consumption of 1 mW. This circuit enables low-cost acquisition of array-level small-area ferroelectric capacitance data, which can guide subsequent device optimization and circuit design.

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