Investigation of integrated passive device with through-silicon via

Li, Kai; Frye, R.C.; Hlaing, MaPhooPwint; Lee, YongTaek; Kim, HyunTai; Kim, Gwang; Ahn, Billy

doi:10.1109/ectc.2012.6249087

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-D Ipd Fabrication Process2

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Cited by 11 publications

(2 citation statements)

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“…3-D IPD processes have emerged with the potential to enhance performance and integration densities when compared to conventional planar IPD technologies [22,23,24,25,26].…”

Section: -D Ipd Fabrication Processmentioning

confidence: 99%

“…These processes typically involve metalizing both sides of a silicon or glass substrate ranging from 50 to 250 µm in thickness. Unlike silicon [22,25], glass offers the advantage of producing solenoids with notably high Q-factors. Inductance densities have, however, remained in the range of 3 to 17 nH/mm 2 , comparable to those achieved by conventional planar IPD technologies using spiral inductors.…”

Section: -D Ipd Fabrication Processmentioning

confidence: 99%

See 1 more Smart Citation

Compact and wideband 3-D IPD butler matrix for millimeter-wave communications

Cayron,

Viallon,

Ghannam

et al. 2024

AEU - International Journal of Electronics and Communications

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“…3-D IPD processes have emerged with the potential to enhance performance and integration densities when compared to conventional planar IPD technologies [22,23,24,25,26].…”

Section: -D Ipd Fabrication Processmentioning

confidence: 99%

Section: -D Ipd Fabrication Processmentioning

confidence: 99%

Compact and wideband 3-D IPD butler matrix for millimeter-wave communications

Cayron,

Viallon,

Ghannam

et al. 2024

AEU - International Journal of Electronics and Communications

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3D TSV based high frequency components for RF IC and RF MEMS applications

Fernández-Bolaños

Vitale

Lopez

et al. 2016

2016 IEEE International 3D Systems Integration Conference (3DIC)

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We demonstrate and review the unique fine-pitch high-aspect ratio tungsten-filled through-silicon vias (W-TSVs) technology developed by Fraunhofer EMFT in high-resitivity silicon substrates. The proposed process flow is fully compatible with both CMOS and MEMS technology, allowing 3D heterogeneous integration of highperformance, low power, compact tunable RF front-ends. We have assessed the figures of merit of the technology for RF functionality by fabricating and characterizing different configurations for CPWs with TSV transitions, mm-wave antennas and LC resonators as well as record-high performance wideband out-of-plane micro-inductors

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