Investigation of a lead-free flip chip assembly process

Kums, Gerard; Duan, Nian; Scheer, J; Kleef, M. van; Wijers, J.; Bielen, J.A.

doi:10.1109/iemt.2003.1225884

Cited by 1 publication

(2 citation statements)

References 3 publications

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“…Since changing the underfill properties may affect the solder fatigue life, the average plastic work increment (averaged over the top 20 mm of the bump) was also calculated from two additional temperature cycles. The durability data to predict cycles to failure for this damage criterion was taken from (Dasgupta, 2002) and complies with experimental fatigue life measured on samples without underfill (reported in Kums et al (2003)). Here, the plastic work increment will only be used to indicate trends when using different underfills.…”

Section: Finite Element Modelmentioning

confidence: 99%

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Delamination and solder flow‐out in underfilled and Pb‐free flip chips on laminate

Kleef

Bielen

Gülpen

et al. 2005

Microelectronics International

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Purpose -In land grid array hybrid or system in package type products passive integration on silicon dies are flip chip mounted on a laminate substrate using Pb-free solder. To increase the solder bump fatigue life, underfill is applied. The application of underfill resulted in the occurrence of an unexpected and unwanted phenomenon: solder flowing out of the underfill during a second level reflow test. The occurrence of solder flow-out seemed associated with moisturizing as part of a moisture sensitivity level assessment. The solder flow-out is preceded by delamination, initiated by mismatch in coefficient of thermal expansion between copper through-holes and laminate. This paper aims to describe the phenomenon and possible solutions by combining experiments with finite element (FE) simulations. Design/methodology/approach -Ways to prevent this kind of overstress failures are investigated by design of experiments and observed trends are compared with thermo-mechanical FE simulations. A significant contribution is made by through-holes close to the bump and underfill fillet. Findings -The FE simulations confirmed increased thermo-mechanical induced stress levels by bad positioning of vias, underfill and solder. The integrity of the flip chip construction is substantially improved by optimising product design, underfill material and the associated assembly process. Originality/value -This paper is a useful source of information on the causes of delamination and solder flow-out.

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Section: Finite Element Modelmentioning

confidence: 99%

“…In previous studies (Beelen-Hendrikx et al, n.d.;Kums et al, 2003) reliability of flip chip on laminate has extensively been investigated. To obtain a sufficient fatigue life an underfill material was selected.…”

Section: Introductionmentioning

confidence: 99%