Investigation of 4H-SiC MOS capacitors annealed in diluted N2O at different temperatures

Zhao, Peng; Rusli, Rusli; Liu, Y.; Tin, C. C.; Zhu, Weiguang; Ahn, J.

doi:10.1016/j.mee.2005.10.026

Cited by 24 publications

(14 citation statements)

References 9 publications

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“…4b, determined by both high-low and conductance methods. This is one magnitude lower than the values [32,33] for 4H-SiC without further post oxidation annealing. The lower D it value for devices with as-deposited Ohmic contacts confirms the PMA step leads to additional interface traps (schematic diagram shown in Fig.…”

Section: B 3c-sic Mosfets Without Ohmic Contact Annealingcontrasting

confidence: 57%

3C-SiC Transistor With Ohmic Contacts Defined at Room Temperature

Sharma

Walker

et al. 2016

IEEE Electron Device Lett.

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Section: B 3c-sic Mosfets Without Ohmic Contact Annealingcontrasting

confidence: 57%

3C-SiC Transistor With Ohmic Contacts Defined at Room Temperature

Sharma

Walker

et al. 2016

IEEE Electron Device Lett.

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“…This trend is not specific to the NI states and is also observed for other interface states. 12,[20][21][22] The capture cross section of the NI states is larger than that of the other interface states, even near the E C . At E C ÀE T ¼ 0.15 eV, for example, the capture cross section of the NI states is about 1 Â 10 À14 cm 2 , while that of the conventional interface states is 10 À20 -10 À18 cm 2 .…”

Section: Resultsmentioning

confidence: 96%

Characterization of very fast states in the vicinity of the conduction band edge at the SiO2/SiC interface by low temperature conductance measurements

Yoshioka

Nakamura

Kimoto

2014

Journal of Applied Physics

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We have investigated the unique interface states (NI) generated by NO annealing at the SiO2/SiC interfaces by low-temperature conductance measurements, which is more suitable for characterization of very fast interface states than high-frequency conductance measurements at room temperature. Although only a part of the NI states can be evaluated by measurements at room temperature, the whole picture of the NI states, especially near the conduction band edge (0.07 eV ≤ EC−ET), has been revealed by the low temperature measurements. The NI peak was present at the interface even without NO annealing. The NI density increased with NO annealing temperature. The NI density at the energy levels shallower than 0.2 eV exceeded 1012 cm−2eV−1 after NO annealing. The capture cross section of the NI states is uniquely larger than that of conventional interface states.

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“…Evaluation of the interface state density by the conductance method Figure 5(a) shows the frequency dependence of G PIT /x at various surface potentials. Bell-shaped peaks originate from the interface states, and the interface state density is related to G PIT /x by 10,17…”

Section: Evaluation Of the Interface State Density By The High-lowmentioning

confidence: 99%

“…The interface state density is characterized by high-low or conductance methods with the maximum frequency of 0.1 $ 1 MHz. [2][3][4][5][6][7][8][9][10][11][12][13][14] The existence of fast interface states has been suggested 15,16 but the fast interface states that respond to the maximum probe frequency are undetectable by these methods. Although increasing the frequency is a method to detect fast states, very high-frequency measurements are not easily obtained because of series resistance and inductance.…”

Section: Introductionmentioning

confidence: 99%

Accurate evaluation of interface state density in SiC metal-oxide-semiconductor structures using surface potential based on depletion capacitance

Yoshioka

Nakamura

Kimoto

2012

Journal of Applied Physics

119

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We propose a method to accurately determine the surface potential (w S) based on depletion capacitance, and the interface state density (D IT) was evaluated based on the difference between quasi-static and theoretical capacitances in SiC metal-oxide-semiconductor capacitors (CÀw S method). We determined that this method gives accurate values for w S and D IT. From the frequency dependence of the capacitance measured at up to 100 MHz, a significant fast-interface-state response exists at 1 MHz, which results in the overestimation of w S if it is determined based on the flatband capacitance at 1 MHz. The overestimation of w S directly affects the accuracy of the energy level. D IT at a specific energy level is underestimated by the overestimation of w S. Furthermore, the fast interface states that respond at 1 MHz cannot be detected by the conventional high(1 MHz)-low method. The CÀw S method can accurately determine the interface state density including the fast states without high-frequency measurements. V

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Investigation of 4H-SiC MOS capacitors annealed in diluted N2O at different temperatures

Cited by 24 publications

References 9 publications

3C-SiC Transistor With Ohmic Contacts Defined at Room Temperature

3C-SiC Transistor With Ohmic Contacts Defined at Room Temperature

Characterization of very fast states in the vicinity of the conduction band edge at the SiO2/SiC interface by low temperature conductance measurements

Accurate evaluation of interface state density in SiC metal-oxide-semiconductor structures using surface potential based on depletion capacitance

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