Inverter Using CAAC-IGZO FET with 60-nm Gate Length Fabricated in BEOL

27‐1: Fabrication Method for Miniaturized CAAC‐OS FET for High‐Definition AR/VR Displays

“…We fabricated a miniaturized CAAC-OS FET and a backplane of a submicron high-definition display and report them in this study. [7,8,12]. This structure, in which a channel is covered with a top gate, is close to the device structure of a Fin FET [13] in silicon FETs (SiFETs).…”

“…Oxide semiconductors (OS) are used for backplanes of many displays [1][2][3][4][5][6]. A c-axis aligned crystalline OS field effect transistor (CAAC-OS FET) has the following characteristics: a small number of masks are needed compared with a lowtemperature polysilicon FET, and a crystalline OS has no grain boundaries unlike polysilicon and thus has stable reliability; therefore, a device having a high withstand voltage can be fabricated using a crystalline CAAC-OS FET [7,8].…”

“…Figure2shows bird's-eye views. A normal metal-oxide-semiconductor field effect transistor has a planer structure as shown in Fig.2(a), and a CAAC-OS FET we have developed has a trench-gate-self-aligned (TGSA) structure shown in Fig.2(b)[7,8,12]. This structure, in which a channel is covered with a top gate, is close to the device structure of a Fin FET[13] in silicon FETs (SiFETs).…”