Introduction to flash memory

Bez, R.; Camerlenghi, E.; Modelli, Alberto; Visconti, A.

doi:10.1109/jproc.2003.811702

Cited by 712 publications

(433 citation statements)

References 28 publications

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“…Advanced flash memory technology can store more than 1 bit in each flash memory cell, making it possible to increase the memory density further without reducing the cell size. The stored charges are located in the potential well of blocking (or sometimes called control oxide) and tunnelling oxide layers, so the information can be maintained even after the power outage, resulting in nonvolatile memory operations [19][20][21]. This is the major technical advancement that has been made since the invention of flash memory devices using the floating gate.…”

Section: Operations Of Non-volatile Memory Devicesmentioning

confidence: 99%

“…In addition, nonvolatility is important since high-performance and high-density non-volatile memory devices should be integrated with consumer electronic devices (for example, mobile phones, digital cameras, potable media players, laptop computers, etc.). Therefore, tremendous effort has been made toward the development of high-density, low-cost, and nonvolatile solid-state storage devices [17][18][19][20][21][22][23][24][25][26][27][28]. Among the many types of non-volatile memory technology, flash memory devices based on the floating gate have been widely used due to their massive memory capacity, which has been required for many applications [17,[19][20][21]23].…”

Section: Introductionmentioning

confidence: 99%

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Recent progress in gold nanoparticle-based non-volatile memory devices

Jang‐Sik

2010

Gold Bull

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Recently, much progress has been made toward the fabrication of non-volatile memory devices based on metallic nanoparticles. Among the many kinds of nanoparticles, gold nanoparticles are some of the most widely used materials for charge trapping elements in non-volatile memory devices because they are chemically stable, easily synthesized, and have a high work function. Various synthesis methods have been applied to fabricate gold nanoparticle-based nonvolatile memory devices and recent progress indicates that gold is a very promising material for non-volatile memory applications. In this article, the recent advances in fabrication and characterization of gold nanoparticle-based nonvolatile memory devices, with an emphasis on flash memory-type memory devices, are reviewed. Detailed device fabrication, characterization, and future directions are reported based on the recent research activities and literature.

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Section: Operations Of Non-volatile Memory Devicesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Recent progress in gold nanoparticle-based non-volatile memory devices

Jang‐Sik

2010

Gold Bull

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“…Simple concepts of organic non-volatile memories (NVM) are needed, because of their importance for individualizing RFID tags or to reversibly program organic circuits 17 . Preferably, the memory functionality should be realized with low supply voltage and with the same device structures and the same materials utilized for the transistors, to avoid unnecessary complexity 18 .…”

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confidence: 99%

Concept of a Molecular Charge Storage Dielectric Layer for Organic Thin‐Film Memory Transistors

Burkhardt¹,

Jedaa²,

Novák³

et al. 2010

Advanced Materials

115

121

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Citation for published item:furkh rdtD wF nd ted D eF nd xov kD wF nd i elD eF nd o¤ %t hovskyD uF nd tell iD pF nd rirs h D eF nd r likD wF @PHIHA 9gon ept of mole ul r h rge stor ge diele tri l yer for org ni thinE(lm memory tr nsistorsF9D edv n ed m teri lsFD PP @PQAF ppF PSPSEPSPVF Further information on publisher's website:httpXGGdxFdoiForgGIHFIHHPG dm FPHIHHHHQH Publisher's copyright statement: his is the epted version of the following rti leX furkh rdtD wF nd ted D eF nd xov kD wF nd i elD eF nd o¤ %t hovskyD uF nd tell iD pF nd rirs h D eF nd r likD wF @PHIHA 9gon ept of mole ul r h rge stor ge diele tri l yer for org ni thinE(lm memory tr nsistorsF9D edv n ed m teri lsFD PP @PQAF ppF PSPSEPSPVD whi h h s een pu lished in (n l form t httpXGGdxFdoiForgGIHFIHHPG dm FPHIHHHHQHF his rti le m y e used for nonE ommer i l purposes in ord n e ith ileyE gr erms nd gonditions for selfE r hivingFAdditional information:Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-pro t purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details. In this work we report on a novel concept of an electrically programmable selfassembled molecular gate dielectric layer for OTFTs (see figure 1a) that can be reversibly charged and discharged and retains these digital states even when the supply voltage is removed. Due to the small thickness of the dielectric stack (app. 5.7 nm), the memory transistors operate with very small program and erase voltages of ± 2 V. Despite the extremely small dielectric thickness, the retention time is already promising (~6 hours with a read voltage of -750 mV applied continuously). The dielectric is a mixed monolayer of aliphatic and C 60 -functionalized phosphonic acid molecules (app. 2.1 nm thickness) on a patterned and plasma-oxidized aluminum gate electrode on a glass substrate. The aluminum oxide (AlO x ) contributes with a thickness of 3.6 nm to the dielectric layer stack 6 . As the aliphatic component, n-octadecylphosphonic acid 1 was chosen, which has already shown excellent insulating characteristics as the gate dielectric 6 . As the charge storage component, the C 60 -derivative 2 was synthesized to take advantage of the strong acceptor properties and reversible redox behavior of C 60 (Figure 1b and Supplementary Information SI-1) and of the self-assembly properties induced by the C 18 -aliphatic tail with phosphonic acid anchor group.Mixed self-assembled monolayers of 1 and 2 were created by a simple "one pot" solution content) have a relatively small memory ratio of 2.5 (see Section I in Figure 3b), the devices

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“…Flash memory [2] is an EEPROM where the entire chip or a subarray within the chip may be erased at one time. There are many variants of Flash, but presentday production is dominated by two types: NAND Flash, which is oriented toward data -block storage applications, and common ground NOR Flash, which is suited for code and word addressable data storage.…”

Section: Elementary Memory Conceptsmentioning

confidence: 99%

“…In practice the design of Flash cells has several fl avors each of which has advantages and disadvantages. Figure 1.11 groups some of the existing Flash varieties by addressing method and by program and erase technique (see Figure 5 in Bez et al [2] ). As mentioned earlier, the common ground NOR used for both code and data storage, and the NAND used for mass storage, presently dominate the market.…”

Section: Flash Memory and Flash Cell Variationsmentioning

confidence: 99%