Interleavers

Ridder, R.M. de; Roeloffzen, C.G.H.

doi:10.1007/3-540-31770-8_10

Cited by 5 publications

(1 citation statement)

References 83 publications

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“…In particular, echelle gratings [21], [22] and arrayed waveguide gratings (AWGs) [22]- [24] have been fabricated exhibiting remarkable specifications in C and L bands with up to 32 channels, 200 GHz spacing and sub-mm 2 footprint [24], even though such multiplexing structures typically tended to occupy large area to support many channels with dense spacing. Cascaded asymmetric Mach-Zehnder Interferometers (A-MZIs) serving as interleavers have been also presented, relying however on a full binary tree architecture with N stages for full demultiplexing of 2N channels [25], [26] that leads to subordinate scalability compared to other type of MUX devices (e.g., AWGs) [27]. Moreover, the realization of dense channel spacing comes at the expense of the device footprint, since the channel spacing is inversely proportional to the MZI length asymmetry [25].…”

Section: Introductionmentioning

confidence: 99%

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUX <roman>s</roman>/DEMUX <roman>s</roman> With 40-GH <roman>z</roman> Channel Bandwidth

et al. 2015

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We demonstrate two 8 Â 1 silicon ring resonator (RR)-based multiplexers (MUXs) integrated on the same chip for dual-stream 16-channel multiplexing/ demultiplexing applications. Cascaded second-order RRs equipped with microheaters were integrated on a silicon-on-insulator platform with the radii of MUX1 and MUX2 being $12 and $9 m, respectively. The resonances of the two MUXs were thermooptically tuned in order to achieve 100-GHz channel spacing, revealing a tuning efficiency of 43 and 36 W/GHz/RR for MUX1 and MUX2, respectively, and 352 mW total power consumption. Lower than $18 dB crosstalk and higher than $40-GHz 3-dB bandwidth was obtained for the tuned channels of the MUXs. The signal integrity when using these devices in multiplexing and demultiplexing operations was evaluated for a 4 Â 10 Gb/s non-return-to-zero data stream (i.e., 10 Gb/s line rate) via bit-error-rate measurements, yielding error-free performance with up to 0.2 dB power penalty for all channels. Proofof-concept demonstration for supporting higher data rates was also realized by using three 100-GHz-spaced 25-Gb/s return-to-zero data signals (i.e., 25 Gb/s line rate) for multiplexing and demultiplexing via MUX2, resulting in error-free operation for all channels with lower than 0.3 dB power penalties.

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Section: Introductionmentioning

confidence: 99%

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUX <roman>s</roman>/DEMUX <roman>s</roman> With 40-GH <roman>z</roman> Channel Bandwidth

et al. 2015

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Design of strain-introduced MZI interleaver on LiNbO3 substrate

Zheng

Chen

Xie

2013

Optoelectron. Lett.

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Synthesis of Asymmetric Flat-Top Birefringent Interleaver Based on Digital Filter Design and Genetic Algorithm

et al. 2013

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A flexible and fast synthesis method for designing asymmetric interleavers with flat-top, low dispersion, adjustable isolation, and bandwidths at both outputs is proposed. Interleavers are designed on birefringent technology allowing linear-phase designs. Z -transform properties and digital filter design techniques are used for designing interleavers under a set of specifications. At a second level, a genetic algorithm optimization approach allows improving the interleaver design adjusting the minimum isolation, at both outputs, below À43 dB and the stop bandwidths to specific normalized values of AE0.15 and AE0.3, with zero dispersion at one output. Improvement of the interleaver order and dispersion below AE50 ps/nm at both outputs are also reported.

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Interleavers

Cited by 5 publications

References 83 publications

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUX <roman>s</roman>/DEMUX <roman>s</roman> With 40-GH <roman>z</roman> Channel Bandwidth

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUX <roman>s</roman>/DEMUX <roman>s</roman> With 40-GH <roman>z</roman> Channel Bandwidth

Design of strain-introduced MZI interleaver on LiNbO3 substrate

Synthesis of Asymmetric Flat-Top Birefringent Interleaver Based on Digital Filter Design and Genetic Algorithm

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