Interfacial hardness enhancement in deuterium annealed 0.25 μm channel metal oxide semiconductor transistors

Devine, R. A. B.; Autran, Jean‐Luc; Warren, W. L.; Vanheusdan, K. L.; Rostaing, J. C.

doi:10.1063/1.118769

Cited by 76 publications

(38 citation statements)

References 6 publications

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“…From hydrogen-deuterium isotope experiments [1], it has recently been shown that hot electron degradation in MOSFETs is due in large part to the de-passivation of Si-H(D) bonds at the SiSiO 2 interface. These results have been verified by both academic [2] and corporate research [3] teams. The degradation in MOSFETs has been argued to be limited by hydrogen diffusion away from the interface into bulk SiO 2 .…”

Section: Introductionsupporting

confidence: 75%

“…The isotope effect [1][2][3] indicates that hydrogen plays a significant role in hot electron degradation of MOSFETs. With charge pumping measurements in 0.25 micron MOSFETs [2], the density of interface traps has been determined as a function of silicon Fermi energy position and hot electron stress. After hot electron stress, a distributions emerged with two peaks at 0.25 eV below and 0.2 eV above silicon mid-gap.…”

Section: Hydrogen Defects Created During Hot Electron Stressmentioning

confidence: 99%

“…The degradation in MOSFETs has been argued to be limited by hydrogen diffusion away from the interface into bulk SiO 2 . [4,5] Using charge pumping and capacitence-voltage experiments, Devine et al [2] and Cartier et al [6] determined the charge transition energies for defects at the Si-SiO 2 interface of MOSFETs. These experiments place stringent limits on the possible atomic models for hot electron degradation.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Hydrogen-related defect creation at the Si(100)–SiO2interface of metal-oxide-semiconductor field effect transistors during hot electron stress

Tuttle

Hess

2000

Superlattices and Microstructures

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Section: Introductionsupporting

confidence: 75%

Section: Hydrogen Defects Created During Hot Electron Stressmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Hydrogen-related defect creation at the Si(100)–SiO2interface of metal-oxide-semiconductor field effect transistors during hot electron stress

Tuttle

Hess

2000

Superlattices and Microstructures

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“…Since the chemistry of deuterium and hydrogen is identical deuterium was equally effective in passivating the Si-SiO 2 interface. This development followed a new wave of interests in deuterium for the SiSiO 2 system (19)(20)(21)(22). Integration of deuterium annealing into mainstream semiconductor manufacturing faced some technical challenges (23)(24).…”

Section: Deuterium At Si-sio 2 Interfacementioning

confidence: 99%

(DS&T Thomas D. Callinan Award Presentation) Role of Hydrogen in Dielectrics for Electronics and Optoelectronics Devices

Misra

2013

ECS Trans.

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In silicon-based electronic and optoelectronic devices hydrogen plays a significant role in passivating silicon dangling bonds. This improves the device performance and reliability of the devices by producing a high quality Si-SiO 2 interface. This work reviews the early use of hydrogen in standard silicon MOS devices with SiO 2 as gate dielectric to recent devices with high-k gate stacks. Role of hydrogen's isotope deuterium is outlined. In addition, the impact of hydrogen in high-k gate dielectrics on silicon and germanium substrates is also discussed. Contribution of hydrogen/deuterium in photodiode performance is also briefly described.

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“…It is commonly accepted that the interface trap generation is caused by hole and electron injection into the oxide during channel hot carrier stressing or drain avalanche stressing. The recent discovery of the giant deuterium isotope effect in transistor degradation [8]- [11] widely accepted model of interface trap generation by hot carrier injection is true, then carrier injection experiments should exhibit the same giant isotope effect as has been observed for drain avalanche stressing. Such experiments and their consequences for the mechanism of trap generation are the subject of this letter.…”

mentioning

confidence: 99%

On the mechanism for interface trap generation in MOS transistors due to channel hot carrier stressing

Chen

Hess

Lee

et al. 2000

IEEE Electron Device Lett.

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Abstract-The classical concept and theory suggest that the degradation of MOS transistors is caused by interface trap generation resulting from "hot carrier injection." We report three new experiments that use the deuterium isotope effect to probe the mechanism for interface trap generation in n-MOS transistors in the presence of hot hole and electron injection. These experiments show clearly that hot carrier injection into the gate oxide exhibits essentially no isotope effect, whereas channel hot electrons at the interface exhibit a large isotope effect. This leads to the conclusion that channel hot electrons, not carriers injected into the gate oxide, are primarily responsible for interface trap generation for standard hot carrier stressing. widely accepted model of interface trap generation by hot carrier injection is true, then carrier injection experiments should exhibit the same giant isotope effect as has been observed for drain avalanche stressing. Such experiments and their consequences for the mechanism of trap generation are the subject of this letter. We have performed three experiments to intentionally inject holes and electrons deep into the oxide and also have them present only at the interface. In the experiments, 0.35-µm 3.3-V NMOS transistors with a gate oxide of 65 Å were used. In the first experiment, hot holes were injected into the oxide by applying a negative gate voltage ( V). A detailed description of hole injection and trapping in the oxide can be found in [12]. For the hole injection experiment, the source, drain, and bulk (p-well) were grounded, and a negative bias (−9 V) was applied to the gate in the dark. In the second experiment, hot electrons were injected deep into the oxide from the substrate. To achieve this, the drain and source were floated, the gate was grounded, and a negative bias from −12 to −17 V was applied to the bulk. The third experiment was designed to direct hot electrons only toward the interface from the substrate. In this experiment, the source and drain were grounded, 1 V was applied to gate, and −11 V was applied to the substrate. A large number of hot electrons (in milliamperes) can be generated by impact ionization in the depletion region. These hot electrons are confined to the immediate region of the interface because of the low gate voltage. In addition, we performed standard drain avalanche hot carrier stressing of NMOS transistors by stressing at the maximum substrate current with V. The degradation tests were carried out using an HP4155A semiconductor parameter analyzer. The test code was modified to monitor the polarity of the shift of the threshold voltage and the transconductance . The interface traps were monitored by charge-pumping measurements. The set-up consists of the HP4155A, an HP E5250A switching matrix, and a Racal-Dana 2021 programmable pulse generator. Fig. 1 shows the results from the first experiment, which measures the deuterium isotope effect for the hot hole injection only. The figure shows the time-dependent shift and the interfac...

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Interfacial hardness enhancement in deuterium annealed 0.25 μm channel metal oxide semiconductor transistors

Cited by 76 publications

References 6 publications

Hydrogen-related defect creation at the Si(100)–SiO2interface of metal-oxide-semiconductor field effect transistors during hot electron stress

Hydrogen-related defect creation at the Si(100)–SiO2interface of metal-oxide-semiconductor field effect transistors during hot electron stress

(DS&T Thomas D. Callinan Award Presentation) Role of Hydrogen in Dielectrics for Electronics and Optoelectronics Devices

On the mechanism for interface trap generation in MOS transistors due to channel hot carrier stressing

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