Integrating testability with design space exploration

Zwoliński, Mark; Gaur, Manoj Singh

doi:10.1016/s0026-2714(03)00034-9

Cited by 6 publications

(4 citation statements)

References 14 publications

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“…However, the use of scalarization approaches is only justified when they generate Pareto optimal solutions [30]. Zwolinski and Gaur [15] optimized the delay and area by an aggregation method, scaling from multiobjective to monoobjective with a simple weight vector (see equation ( 3)). Within the next two years, another three approaches from this emerging research field were published, and one of them was [73] with single-solution based metaheuristics.…”

Section: Single-solution Based Metaheuristics Aggregation Methods Consists Of Changing a Multiobjective Optimizationmentioning

confidence: 99%

“…e origins of HLS can be traced back to the ALERT system [14], developed by IBM at the T. J. Watson Research Center in 1969, but it was not until 2003 [15] that this task was studied as a combinatorial multiobjective problem for FPGA devices. Since then, several surveys concerning Scientific Programming optimizations (regardless of the number of objective functions) in HLS for FPGA devices have been published.…”

Section: Related Surveysmentioning

confidence: 99%

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Development of Multiobjective High-Level Synthesis for FPGAs

Bulnes

Maldonado

Trujillo

2020

Scientific Programming

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Traditionally, the High-Level Synthesis (HLS) for Field Programmable Gate Array (FPGA) devices is a methodology that transforms a behavioral description, as the timing-independent specification, to an abstraction level that is synthesizable, like the Register Transfer Level. This process can be performed under a framework that is known as Design Space Exploration (DSE), which helps to determine the best design by addressing scheduling, allocation, and binding problems, all three of which are NP-hard problems. In this manner, and due to the increased complexity of modern digital circuit designs and concerns regarding the capacity of the FPGAs, designers are proposing novel HLS techniques capable of performing automatic optimization. HLS has several conflicting metrics or objective functions, such as delay, area, power, wire length, digital noise, reliability, and security. For this reason, it is suitable to apply Multiobjective Optimization Algorithms (MOAs), which can handle the different trade-offs among the objective functions. During the last two decades, several MOAs have been applied to solve this problem. This paper introduces a comprehensive analysis of different MOAs that are suitable to perform HLS for FPGA devices. We highlight significant aspects of MOAs, namely, optimization methods, intermediate structures where the optimizations are performed, HLS techniques that are addressed, and benchmarks and performance assessments employed for experimentation. In addition, we show the analysis of how multiple objectives are optimized currently in the algorithms and which are the objective functions that are optimized. Finally, we provide insights and suggestions to contribute to the solution of major research challenges in this area.

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Section: Single-solution Based Metaheuristics Aggregation Methods Consists Of Changing a Multiobjective Optimizationmentioning

confidence: 99%

Section: Related Surveysmentioning

confidence: 99%

Development of Multiobjective High-Level Synthesis for FPGAs

Bulnes

Maldonado

Trujillo

2020

Scientific Programming

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show abstract

“…Every such configuration of FUs is called a BIST embedding (BE). Further details for the assumptions and constraints can be found in [12]. To illustrate the advantages of this approach, consider the scheduled data flow graph in Figure 3 illustrating the test area and test time requirements.…”

Section: An Examplementioning

confidence: 99%

“…The complexity of the algorithm will be the the product of number of controller states, maximum number of instruction groups per state, maximum number of FUs per group and maximum number of registers per FU. As the upper limits of individual parameter is generally small and also the nature of the implementation is incremental being attached with the transforms, it provides very good efficiency in comparison to the earlier constructive method presented in [12].…”

Section: The Techniquementioning

confidence: 99%