Integrated low-noise low-power fast charge-sensitive preamplifier for avalanche photodiodes in JFET-CMOS technology

Abstract

To take advantage of the compactness of avalanche photodiode (APD) arrays, low-noise power-efficient fast charge-sensitive preamplifier chips with differential current drivers have been developed. A 16-channel and a single-channel version are available. The chips were adapted for low-capacitance 4 8 APD arrays produced by Hamamatsu, Japan. A mixed junction field-effect transistor (JFET)-CMOS production process yielded high-quality integrated JFETs for the input stage of the amplifier's folded cascode. Thus, the 1 -noise corner is kept at 4 kHz. The JFET has a transconductance of 11 mS at a drain current of 3 mA. The serial noise of the input transistor was found to be 0.8 nV Hz. The signal rise time of the driver outputs is 20 ns. The rms noise of the preamplifier was found to be 480 e with a 25-e pF noise slope for a shaping time of 50 ns. The serial input noise of the preamplifier is about 1.4 nV Hz from 200 kHz up to 40 MHz, and the 1 -noise corner is at 70 kHz. The power consumption is 30 mW per preamplifier, including the differential driver. The linearity is better than 1.3% over 48-dB dynamic range. For the 16-channel chip, the channel-to-channel gain variation is less than 3.5%. Performance similar to photomultiplier tubes can be achieved with APDs in combination with this integrated preamplifier chip.Index Terms-Aavalanche photodiode (APD), charge-sensitive preamplifier, junction field-effect transistor (JTET)-CMOS, lownoise preamplifier.

Study of low noise multichannel readout electronics for high sensitivity PET systems based on avalanche photodiode arrays

“…This is however above the dynamic range of the ASIC chip being evaluated . We thus, had to implement a terminating resistor (10)(11)(12)(13)(14)(15)(16)(17)(18)(19)(20) ) to drain enough of the signal charge to be within the linear region of the input dynamic range of the chip. …”

“…In order to practically manage a relatively large number of such readout channels, low noise and low power integrated front-end readout electronics optimized to a particular design configuration are required. Recently, low noise and low power application specific integrated circuits (ASICs) have been designed for certain types of APD arrays [13], [14]. However, these designs are not currently commercially accessible for our application.…”

17 Interface Circuitry and Microsystems

“…Charge preamplifiers are commonly used for very low currents (for example, in particle detectors). [41][42][43][44][45][46][47][48] Since a long integration time is required, the bandwidth of these circuits is quite small.…”

A high-speed low-noise CMOS 16-channel charge-sensitive preamplifier ASIC for APD-based PET detectors

“…Several ICs designed for APD-based PET cameras have been designed [7][8][9], but all have drawbacks. The amplifier in [7] was designed for a 10 pF APD and uses a "superregulated" cascode topology that further boosts the open-loop gain by increasing the loop gain of the local feedback, but the IC contains only a single channel.…”

“…The amplifier in [8] uses a regulated, or "gain-boosted" cascode (this adds a local feedback loop which helps boost the open-loop gain of the op-amp) and was designed for a relatively high capacitance (30 pF) APD, but it too has only a single channel. The amplifier in [9] is a 16-channel array that uses a JFET as the input device, but has a relatively slow (20 ns) rise time.…”