Integrated 130 nm CMOS passive mixer for 5 GHz WLAN applications

Circa, R.; Pienkowski, D.; Boeck, Georg

doi:10.1109/imoc.2005.1580092

Cited by 8 publications

(5 citation statements)

References 9 publications

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“…7 shows the inputreferred third-order intercept point is approximately 14dBm. Table I summarizes the comparison of the proposed mixer and other similar mixers described in [10] and [11]. From this table, it can be seen that the proposed mixer has the higher linearity and higher conversion gain.…”

Section: Mesurement Resultsmentioning

confidence: 99%

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

Lai

Shi

et al. 2011

2011 7th International Conference on Wireless Communications, Networking and Mobile Computing

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This paper describes a 5.15GHz -5.825GHz CMOS down-conversion mixer for WLAN 802.11a receiver. Currentreuse technique is adopted at the transconductance stage, and the folded topology with current bleeding is implemented at the switching stage. Since the transconductance stage and the switching stage are AC-coupled through capacitors, the DC bias is independently configured by this kind of topology. This mixer is implemented in IBM 0.13μm CMOS process, and the active chip area is 967μm×828μm. Operating from a 1.3V power supply, power consumption for this down-conversion mixer is 12mW. When 5.2GHz testing RF input is supplied, the measurement results show that the circuit achieves 10.5dB conversion gain, 14dBm input-referred third-order intercept point. The single-sideband noise figure is about 16.02dB.

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Section: Mesurement Resultsmentioning

confidence: 99%

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

Lai

Shi

et al. 2011

2011 7th International Conference on Wireless Communications, Networking and Mobile Computing

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“…On the other hand, conversion loss is degraded from -5.35 dB to -5.85 dB and NF is raised from 4.7 dB to 5.15 dB. [11] in Table 2 …”

Section: Offset Mixer Placementmentioning

confidence: 99%

Dual band offset mixer for on-chip RF test in 0.13 μm CMOS

Mehdi

2009

2009 IEEE 13th International Multitopic Conference

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This paper discusses motivation and design of an offset mixer and investigates its optimum placement in loopback test setup for on-chip RF test. Based on this study, design and implementation of an offset mixer for on-chip RF testing of radio front ends is presented. The offset mixer is passive in nature reducing silicon area and power overheads. Mixer is implemented and the design aims for dual band operation i.e. Bluetooth & WLAN standards and high linearity. Post layout results indicate that the mixer has excellent noise figure of 5dB, low conversion loss of less than 5dB as well as high IP3 of 12.5 dBm. Proposed passive offset mixer with almost zero dc power consumption and minimal silicon area makes it best suitable for on chip RF test. Pre & post-layout simulation results obtained with Cadence Spectre RF are presented.

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“…As the LO port is connected to the gate of the NMOS transistors, a very high impedance is observed at this port. As the maximum voltage, and not the power transfer, is required at the LO port to modulate channel resistance, lack of the matching circuit does not affect the efficiency of the mixer [8]. The magnitude of LO reflection coefficient is low as expected indicating that the impedance seen at the LO port is almost an open circuit.…”

Section: Circuit Designmentioning

confidence: 99%

“…A double‐balanced resistive mixer also exhibits inherent high linearity [2, 3], and it has been shown to be suitable for both homodyne and heterodyne wireless transceivers [4]. Most double‐balanced mixers reported to date have been implemented using four MOSFETs (mixer core) and additional passive elements for RF [5–7], LO [5, 6], and IF matching [7], and to improve LO efficiency [8]. These passive elements occupy significantly more space on the chip die than the mixer transistor core.…”

Section: Introductionmentioning

confidence: 99%

“…These passive elements occupy significantly more space on the chip die than the mixer transistor core. In addition, typically, a double‐balanced mixer configuration requires single‐ended to differential transitions at the RF and LO ports, which are usually implemented off‐chip [4–9], adding cost, size, and complexity. If used in direct down‐conversion receivers, these mixers typically require DC cancellation circuitry to eliminate large DC offset [10, 11].…”

Section: Introductionmentioning

confidence: 99%

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0.18‐μm CMOS wideband passive mixer

Song

Borić–Lubecke

2012

Micro & Optical Tech Letters

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A 0.18‐μm CMOS wideband passive mixer fully integrated with baluns in IBM7HP process is reported. The mixer exhibits wideband operation, despite the intrinsic narrow‐band magnitude balance of passive baluns. Very low DC offset, of less than 3 mV, is achieved without any DC cancellation circuits, due to high LO–RF isolation. At the RF frequency of 2.4 GHz, the combined IF differential outputs provide conversion loss (CL) of 7.5 dB, input 1 dB compression point (IP1dB) of 6.2 dBm, and input third‐order intercept point (IIP3) of 15.5 dBm. This mixer exhibits broad‐band RF impedance matching with reflection coefficient magnitude better than −9.6 dB through the RF frequency range from 1 to 12 GHz. The CL of 10.1–12.9 dB, IP1dB of 8.6–14.4 dBm, and IIP3 of 16–22.2 dBm are achieved at this frequency range for broad‐band applications. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:23–27, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27226

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Integrated 130 nm CMOS passive mixer for 5 GHz WLAN applications

Cited by 8 publications

References 9 publications

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

Dual band offset mixer for on-chip RF test in 0.13 μm CMOS

0.18‐μm CMOS wideband passive mixer

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Integrated 130 nm CMOS passive mixer for 5 GHz WLAN applications

Cited by 8 publications

References 9 publications

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

Dual band offset mixer for on-chip RF test in 0.13 &#x03BC;m CMOS

0.18‐μm CMOS wideband passive mixer

Contact Info

Product

Resources

About

Dual band offset mixer for on-chip RF test in 0.13 μm CMOS