Instruction Sets for Evaluating Arithmetic Expressions

Abstract

The evaluation of anthmeuc expressions on both register-oriented and stack-oriented machines can be stud~ed using the same model because registers can be treated as a stack during the evaluation of express~on trees, without loss m code efficiency The machine model in this paper has a hardware stack m which all computatmns take place. Reg~ster-regmer and regmer-memory instructions are modeled by considering four possible instrucuons for each binary operator, depending on whether one or two operands are taken from the stack and on whether the left or the right operand ~s on top of the stack. There is a cost assocJated wtth each operation code, as well as costs for accessing a value in a register or in memory. The mtmmum cost of computing an expression tree ~s used to compare machines. The comparisons fall into two classes (1) By keeping the instruction set fixed, the effect of increasing the number of registers is studied.(2) Various machines are compared with a machine that has all four kinds of operation instructmns and an arbitrarily deep stack. As part of the framework that allows the comparisons to be performed, a parametenzed algonthm for determining the number of stores that must occur in an optimal computation is developed This algorithm forms the basis of an opttmal code generation algorithm.

Code generation for fixed-point DSPs

“…The architecture model here (described in Section 2) is of a programmable highly encoded Instruction Set Architecture (ISA), fixed-point DSP processor. Formally, this class is an extension of the machine models discussed in Coffman and Sethi [1983]. In the first pass (Section 3), we perform instruction selection and register allocation simultaneously, using the Aho-Johnson algorithm [Aho and Johnson 1976].…”