Proceedings of the 26th Annual International Symposium on Microarchitecture 1993
DOI: 10.1109/micro.1993.282761
|View full text |Cite
|
Sign up to set email alerts
|

Instruction scheduling for the Motorola 88110

Abstract: Static instruction schedulinyis un important optimization to exploit instruction. level parallelisni. If the scheduler has to consider resource construints l o prevent structural huzards, 7lSIlCldhJ the processor tirniny i s simulated by overlayiny binury mutrices representing the resource usuye of instructions. This technique as ruther time consuming. I n this urticle it is shoiiin thet the timiny cun be simulated b y u deterministic finite uutomaton und the matrix operations f o r u simulation step are replu… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Year Published

1995
1995
1996
1996

Publication Types

Select...
4
1

Relationship

0
5

Authors

Journals

citations
Cited by 10 publications
references
References 6 publications
(1 reference statement)
0
0
0
Order By: Relevance