Input buffering requirements of a systolic array for the inverse discrete wavelet transform

Lang, Robert J.; Spray, A.

doi:10.1109/asap.1995.522920

Cited by 3 publications

(1 citation statement)

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“…To clearly establish the advantages of avoiding transposition in Algorithm B, we have not exploited its ability to begin processing data as soon as they become available (i.e., = 1 in our implementation); this feature could provide an even higher speedup. Since the machine available in our laboratory has only 16 processors, data for P = 16 were obtained by measuring the performance of C++ programs running on the DSP-3, whereas data for P > 16 were derived by simulating the larger machines on our system. 3 The dip in Fig.…”

Section: B Experimental Resultsmentioning

confidence: 99%

A parallel implementation of the 2-D discrete wavelet transform without interprocessor communications

Marino

Piuri

Swartzlander

1999

IEEE Trans. Signal Process.

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The discrete wavelet transform is currently attracting much interest among researchers and practitioners as a powerful tool for a wide variety of digital signal and imaging processing applications. This correspondence presents an efficient approach to compute the twodimensional (2-D) discrete wavelet transform in standard form on parallel general-purpose computers. This approach does not require transposition of intermediate results and avoids interprocessor communication. Since it is based on matrix-vector multiplication, our technique does not introduce any restriction on the size of the input data or on the transform parameters. Complete use of the available processor parallelism, modularity, and scalability are achieved. Theoretical and experimental evaluations and comparisons are given with respect to traditional parallelization.

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Section: B Experimental Resultsmentioning

confidence: 99%