Injecting single event upsets in a digital signal processor by means of direct memory access requests: a new method for generating bit flips

Abstract

In this paper P novel approach for injecting Single Event Upsets, (SEU), by means of direct memory access, (DMA), mechanisms is presented. The oyrtem consists in a PC based control unit that generates DMA requests randomly in time to a board containing the processor under test, and a test unit. Experimentation performed on a digital signal processor intended to be used in B satellite project illustrates the potentialities ofthe proposed approach. h d r r rerms-single Eveni Upsets, SEU injection, SEU test, SEU tolerance.

Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applications

“…The second step is to determine the probability that a SEU cause a system error. It has been shown [10][11][12][13][14] that this probability is related with the application cross section, denoted by AP . To increase system reliability, the application cross section should be reduced by means of fault tolerant techniques.…”

Injecting bit flip faults by means of a purely software approach: a case studied

“…In [8] is investigated a fault injection method using the Direct Memory Access (DMA) mechanism available in some processors. This work puts in evidence that an estimation of the MTTF (Mean Time To Failure) of an application can be derived from such fault injection sessions.…”