Influence of Surface Cleaning on Stressvoiding and Electromigration of Cu Damascene Interconnection

Wang, Jen-Pan; Su, Yan–Kuin; Chen, J.F.

doi:10.1109/relphy.2007.369993

Cited by 1 publication

(1 citation statement)

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“…One is the interface between dielectric diffusion barrier, such as SiN x or SiC and Cu, and the other is the interface of diffusion-barrier metal, such as tantalum (Ta) and Cu. [1] The EM and stress-induced voiding (SIV) show remarkable correlation with cap-layer process condition post Cu chemical-mechanical polishing (CMP) by Manuscript Von Glasow et al [2]. The high-energy bombardment during precleaning of cap layer promoted a good adhesion between Cu surface and SiN cap layer, resulting in an excellent EM performance while seriously damaging Cu bulk because of crystal defect and generating SIV.…”

Section: Introductionmentioning

confidence: 99%

Effects of Surface Cleaning on Stressvoiding and Electromigration of Cu-Damascene Interconnection

Wang

Chen

2008

IEEE Trans. Device Mater. Relib.

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The purpose of this paper is to study the effects of surface-clean process on stressvoiding (SV) and electromigration (EM) of Cu-dual-damascene metallization. Prior to the deposition of copper diffusion-barrier metal, conventional argon bombardment is used to clean Cu surface. Higher preclean bias power and shorter preclean time demonstrate remarkable low via resistance and excellent Cu-reliability performance. In addition, the via-diameter effect to Cu stressmigration is explored. A superior Cu precleaning process condition is developed to improve Cu stress-induced voiding and EM. The preclean bias power of argon plasma should be kept as high as possible but not too high to avoid damaging underlying metal, while the resputtering clean time should keep as short as possible but sufficiently long in order to clean via bottoms. To improve ultralarge-scale integrated-circuit yield and reliability of Cu-damascene metallization, the cleaning process of Cu surface becomes more and more critical as CMOS technology continues shrinking. Index Terms-Dual damascene, electromigration (EM), stress-induced voiding (SIV), stressmigration (SM), stressvoiding (SV), ultralarge-scale integrated circuit (ULSI).

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Section: Introductionmentioning

confidence: 99%