Effects of Surface Cleaning on Stressvoiding and Electromigration of Cu-Damascene Interconnection

Abstract

The purpose of this paper is to study the effects of surface-clean process on stressvoiding (SV) and electromigration (EM) of Cu-dual-damascene metallization. Prior to the deposition of copper diffusion-barrier metal, conventional argon bombardment is used to clean Cu surface. Higher preclean bias power and shorter preclean time demonstrate remarkable low via resistance and excellent Cu-reliability performance. In addition, the via-diameter effect to Cu stressmigration is explored. A superior Cu precleaning process condition is developed to improve Cu stress-induced voiding and EM. The preclean bias power of argon plasma should be kept as high as possible but not too high to avoid damaging underlying metal, while the resputtering clean time should keep as short as possible but sufficiently long in order to clean via bottoms. To improve ultralarge-scale integrated-circuit yield and reliability of Cu-damascene metallization, the cleaning process of Cu surface becomes more and more critical as CMOS technology continues shrinking. Index Terms-Dual damascene, electromigration (EM), stress-induced voiding (SIV), stressmigration (SM), stressvoiding (SV), ultralarge-scale integrated circuit (ULSI).

Electromigration Characteristics for Electron Down-Flow in Copper Interconnects

“…From EDX analysis, oxygen signal was observed at the via bottom, suggesting that a metal-oxide layer was formed and then weaken the bonding strength between Cu and TaN layer. To remove this metal-oxide layer, optimized ionized Argon (Ar) plasma (optimized via process) was employed to clean Cu surface by physical bombardment before TaN deposition [13]. For this optimized via process, the resistance versus the stress time plots only display a single behavior, i.e.…”