2015
DOI: 10.1109/tie.2015.2405496
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Influence of Plugging DC Offset Estimation Integrator in Single-Phase EPLL and Alternative Scheme to Eliminate Effect of Input DC Offset and Harmonics

Abstract: In this paper, the dynamic expressions of the amplitude and frequency estimated by the standard enhanced phase-locked loop (EPLL) and the ones with input DC offset estimation integrator (DCEI) are derived originally and reveal that, DCEI enlarges the amplitude of the periodic ripples caused by the dynamic disturbances and prolongs the dynamic process. To achieve correct estimation when the input signal contains DC offset and harmonics while without deteriorating the dynamic performance, an improved EPLL combin… Show more

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Cited by 50 publications
(20 citation statements)
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“…For the purpose of comparison, the advanced PLLs, CDSC-EPLL [22] and MHDC-PLL [23], are tested as well. These three methods are tested under distorted voltages and under other grid disturbances such as phase jump, voltage sag and frequency variation.…”
Section: Simulation Resultsmentioning
confidence: 99%
“…For the purpose of comparison, the advanced PLLs, CDSC-EPLL [22] and MHDC-PLL [23], are tested as well. These three methods are tested under distorted voltages and under other grid disturbances such as phase jump, voltage sag and frequency variation.…”
Section: Simulation Resultsmentioning
confidence: 99%
“…Amount of change in velocity of particles (18) Notice that the direction of particles is typically decided by the second and third term in (18). In the absence of these two terms, particles tend to move in the same direction until boundary condition is fully satisfied.…”
Section: Methodology Employed For Determining the Optimal Pi-4vpi Curmentioning
confidence: 99%
“…The DSOGI-PLL employed in this paper has the capability to detect the positive sequence component and thereby grid synchronising angle (Φ) under input grid voltage distortion and unbalancing. In addition, it minimises the adverse effect of DC component and exhibits a unique ability to handle the voltage and frequency variations adequately [18]. Moreover, to analyse the influence of these measurement errors on the electric grid current performance, the SR frame in-phase and quadrature unit vector voltages can be represented as…”
Section: Impacts Of Dc-offset Measurement Error and Control Algorithmmentioning
confidence: 99%
“…When (1) and (2) to switch to NPCI mode. The proportional-resonant control (PRC) [24] is used to control the grid current and the enhanced phase-locked loop (EPLL) [25] is used to detect the synchronous information of the grid.…”
Section: Overall Control Configuration Of the Mcnpc-gcimentioning
confidence: 99%