We have grown by reduced pressure-chemical vapour deposition Si/Si 1−y C y /Si heterostructures for electrical purposes. The incorporation of substitutional carbon atoms into Si creates a carrier confinement in the channel region of metal oxide semiconductor (MOS) transistors. Indeed, tensile-strained Si 1−y C y layers present a type II band alignment with Si, with a conduction band offset of the order of 60 meV per atomic% of substitutional carbon atoms. For small SiH 6 flows, all the incoming carbon atoms are incorporated into substitutional sites. At 550 • C, when the SiCH 6 flow increases, the substitutional carbon concentration saturates at 1.44%. Meanwhile, the total carbon concentration C T still increases, following a simple law: C T /(1 − C T ) = (0.88-0.92)(F(SiCH 6 )/(F(SiH 4 )). This is a sign that a growing number of C atoms incorporates into interstitial sites. The hydrogenated chemistry adopted does not enable us to achieve selectivity over SiO 2 -masked wafers, but does not generate any adverse loading effect. We have integrated Si/Si 1−y C y /Si stacks (which have been shown to be stable versus conventional gate oxidations and electrical activation anneals) into the channel region of ultra-short gate length (40 nm) nMOS transistors. Secondary ion mass spectrometry profiling has shown that C atoms segregate from the Si 1−y C y layer into the Si cap and the SiO 2 gate, but also that they block the diffusion paths of B coming from the anti-punch through layer towards the gate, generating very retrograde doping profiles. The addition of C leads to a slight degradation of the electron mobility which seems to be linked to the presence of C atoms into interstitial sites. Finally, we have shown that using higher silane and methylsilane mass flows enables us to obtain higher substitutional C concentrations (max: 1.98%) in our Si 1−y C y layers, with a good resulting structural quality.