Influence of electron-beam lithography exposure current level on the transport characteristics of graphene field effect transistors

Abstract

Many factors have been identified to influence the electrical transport characteristics of graphene field-effect transistors. In this report, we examine the influence of the exposure current level used during electron beam lithography (EBL) for active region patterning. In the presence of a self-assembled hydrophobic residual layer generated by oxygen plasma etching covering the top surface of the graphene channel, we show that the use of low EBL current level results in higher mobility, lower residual carrier density, and charge neutrality point closer to 0 V, with reduced device-to-device variations. We show that this correlation originates from the resist heating dependent release of radicals from the resist material, near its interface with graphene, and its subsequent trapping by the hydrophobic polymer layer. Using a general model for resist heating, we calculate the difference in resist heating for different EBL current levels. We further corroborate our argument through control experiments, where radicals are either intentionally added or removed by other processes. We also utilize this finding to obtain mobilities in excess of 18 000 cm2/V s on silicon dioxide substrates. We believe these results are applicable to other 2D materials such as transition metal dichalcogenides and nanoscale devices in general.

High‐Resolution Van der Waals Stencil Lithography for 2D Transistors

“…These polymer residues could lead to additional tunneling resist and increase overall device contact resistance. Although thermal annealing or oxygen plasma etching has been demonstrated to reduce the residues and mitigate this problem, the high temperature or reactive plasma could pose additional damage to the delicate 2D lattice, [8] especially for monolayers. In addition, the island's shape and random distributed polymer residues vary a lot across different devices, which could contribute to the reported large device-to-device variations in lots of literature, [10,11] even using same batch of processes.…”

“…Moreover, the unavoidable polymer residue (both photo-resist or ebeam-resist) during the develop process acts as an insulating barrier for carrier to transport, leading to increased contact resistance and decreased driving capabilities. [7][8][9] In addition, the island's shape and random distributed polymer residue vary a lot across different devices, 2D semiconductors have attracted tremendous attention as an atomically thin channel for transistors with superior immunity to short-channel effects. However, with atomic thin structure, the delicate 2D lattice is not fully compatible with conventional lithography processes that typically involve high-energy photon/electron radiation and unavoidable polymer residues, posing a key limitation for high performance 2D transistors.…”

Transformation and degradation of metal halide perovskites induced by energetic electrons and their practical implications

“…Post-deposition electron beam irradiation has been found useful also for purifying the metal nanostructures [190][191][192][193][194][195]. In addition, electron beam lithography has been performed to generate circuit patterns directly on photoresist films [196][197][198]. Although the electron energy used in the FEBID and lithographic processes is significantly lower than the range in TEM, they share some basic mechanisms, such as energy deposition, knock-on displacement, chemical bond breaking or formation (e.g.…”

Sub-10 nm patterning of few-layer MoS2 and MoSe2 nanolectronic devices by oxidation scanning probe lithography

“…Interestingly, there is yet a modest progress on the use of conventional highresolution lithographic methods such as electron or ion-based beam lithographies for the lateral scaling of 2D materials [9][10][11]. The use of charged particle beams [12][13][14][15][16] and the incomplete removal of the resist residues [17][18][19][20] affect heavily the performance of the fabricated devices.…”