Influence of dummy active patterns on mechanical stress induced by spin-on-glass-filled shallow trench isolation in n-MOSFETs

Channel width dependence of mechanical stress effects induced by shallow trench isolation on device performance of nanoscale nMOSFETs

“…2). The maximum value of g m g m,max increases with decreasing W. In contrast, V th decreases with decreasing W as shown in insert of Fig indicate the increase in l. The enhanced l is caused by r t because r t reduces effective mass and scattering rate [3]. The decrease in V th indicates the increase in n i and the decrease in N A [4,6].…”

“…Effects of mechanical stress induced by shallow trench isolation (STI) on n-channel metal-oxide-semiconductor filed-effect transistors (nMOSFETs) have been widely investigated [1][2][3][4]. Typically, the trench for STI has been filled using spin-on-glass (SOG) process [2,5], which induces tensile stress r t in the Si active region [3].…”

“…Typically, the trench for STI has been filled using spin-on-glass (SOG) process [2,5], which induces tensile stress r t in the Si active region [3]. This stress increases intrinsic carrier concentration n i , subthreshold current I dsub , gate induced drain leakage current (GIDL) current I GIDL , and carrier mobility l, but reduces energy band gap E g , threshold voltage V th , and substrate doping concentration N A [1,3,6].…”

“…For nanoscale nMOSFETs, the separation distance between dummy active regions which reduce micro-loading effects and Si active regions affects STI process, so it induces a mechanical stress [3]. However, influences of mechanical stress effects on electrical characteristics of nanoscale nMOSFETs have been studied only by few researchers [3,4] up to now.…”

“…For nanoscale nMOSFETs, the separation distance between dummy active regions which reduce micro-loading effects and Si active regions affects STI process, so it induces a mechanical stress [3]. However, influences of mechanical stress effects on electrical characteristics of nanoscale nMOSFETs have been studied only by few researchers [3,4] up to now. Although the wide and narrow width nMOSFETs are commonly used in complementary metal-oxidesemiconductor (CMOS) inverter and peripheral circuits, most of the investigations of device reliability issues are performed by using wide width devices to reduce secondary effects.…”