2017
DOI: 10.1002/pssa.201700637
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Influence of AlN Growth Temperature on the Electrical Properties of Buffer Layers for GaN HEMTs on Silicon

Abstract: Despite the fact that a lower growth temperature is generally considered as a drawback for achieving high crystal quality, the necessity to reduce the nucleation temperature of AlN on Silicon has permitted Molecular Beam Epitaxy (MBE) to demonstrate high performance for GaN transistors operating at high frequency. Compared to Metal‐Organic Vapor Phase Epitaxy (MOVPE), the control of the interface between the AlN nucleation layer and the substrate is easier and the reduced growth temperature allows to obtain a … Show more

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Cited by 22 publications
(15 citation statements)
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“…At 40 GHz, losses are 5.7, 0.7 and 2 dB/mm for samples A, B and C respectively, while the sheet resistances are 980, 9560 and 3190 ohms/sq respectively. From Hall effect measurements performed on thin AlN sample grown at 900 °C by molecular beam epitaxy 24 , the residual sheet resistance of the Si substrate is of few tens of kOhms, n -type. Thus, the sheet resistance of samples A, B and C accounts for the presence of carriers induced by the MOVPE process.…”
Section: Discussionmentioning
confidence: 99%
“…At 40 GHz, losses are 5.7, 0.7 and 2 dB/mm for samples A, B and C respectively, while the sheet resistances are 980, 9560 and 3190 ohms/sq respectively. From Hall effect measurements performed on thin AlN sample grown at 900 °C by molecular beam epitaxy 24 , the residual sheet resistance of the Si substrate is of few tens of kOhms, n -type. Thus, the sheet resistance of samples A, B and C accounts for the presence of carriers induced by the MOVPE process.…”
Section: Discussionmentioning
confidence: 99%
“…The mainstream MOCVD technology tends to introduce great thermal stress due to the high reaction temperature. The DC sputtered AlN buffer layer at room temperature has the advantage of low reaction temperature, so the thermal stress inside the AlN buffer layer is substantially reduced and can be negligible [33, 34]. In this work, the stresses are caused by lattice mismatch and defects.…”
Section: Resultsmentioning
confidence: 99%
“…Optimizing the parameters of the substrate and epitaxial structure to suppress the RF loss is key to improving the performance of the Sibased GaN device. In the past ten years, researchers have made a lot of progress in reducing RF loss, such as by etching trenches between the coplanar waveguide (CPW) conductors (Marti et al 2010) [14], using a low-temperature aluminum nitride (AlN) nucleation layer (Cordier et al 2017) [15], and Si substrate nitridation (Wei et al 2020) [11]. They all reduce the RF loss by changing the process conditions, while there are not many reports on the reduction in the RF loss based on the optimization of the buffer layer structure parameters, and this is the focus of our work.…”
Section: Introductionmentioning
confidence: 99%