Industrial Challenges of TiN Hard Mask Wet Removal Process for 14nm Technology Node

Iwasaki, Akihisa; Courouble, Kristell; Lippy, Steven; Buisine, F.; Ishikawa, H.; Cooper, Emanuel I.; Kennedy, Evelyn; Zoll, S.; Broussous, Lucile

doi:10.4028/www.scientific.net/ssp.219.213

Cited by 6 publications

(4 citation statements)

References 5 publications

(7 reference statements)

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“…One known component in many such specific cleaning formulations is H 2 O 2 (hydrogen peroxide) and it has been reported, that by changing the concentration of H 2 O 2 in respective cleaning mixtures or by increasing the temperature the cleaning or respectively etching efficiency can be tuned [1,2]. The higher the temperature, the faster the process, the better the wafer throughput per tool.…”

Section: Introductionmentioning

confidence: 99%

Process Parameter Control for BEOL TiN Hard Mask Etch-Back

Okorn‐Schmidt¹,

Engesser²,

Linder³

et al. 2018

SSP

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In this paper we demonstrate an effective process control mechanism to significantly improve on the process performance of a BEOL post-etch cleaning process with an integrated partial or complete removal of the TiN HM (hard mask) layer by so called formulated chemistries on a single wafer processing tool. The novel process control mechanism enables a 50% reduction in chemical consumption while achieving an at least equivalent TiN etch uniformity.

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Section: Introductionmentioning

confidence: 99%

Process Parameter Control for BEOL TiN Hard Mask Etch-Back

Okorn‐Schmidt¹,

Engesser²,

Linder³

et al. 2018

SSP

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“…Usually, several layers of metals, such as copper, cobalt, aluminium and tungsten, are deposited in BEOL during the fabrication of modern integrated circuits (ICs) and a titanium nitride (TiN) metal layer is typically used as a hard mask to prevent the inter-diffusion of atomic species from one metal layer into another [1][2][3]. The prevention of inter-diffusion of atomic species from one metal layer to another is of prime importance to ensure the reliability and performance of chips [4]. In this work, we investigate the critical thickness of the barrier metal layer that can be effectively used in IC fabrication using a multi-scale modeling approach.…”

Section: Introductionmentioning

confidence: 99%

How thin barrier metal can be used to prevent Co diffusion in the modern integrated circuits?

Dixit¹,

Konar²,

Pandey³

et al. 2017

J. Phys. D: Appl. Phys.

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In modern integrated circuits (ICs), billions of transistors are connected to each other via thin metal layers (e.g. copper, cobalt, etc) known as interconnects. At elevated process temperatures, inter-diffusion of atomic species can occur among these metal layers, causing sub-optimal performance of interconnects, which may lead to the failure of an IC. Thus, typically a thin barrier metal layer is used to prevent the inter-diffusion of atomic species within interconnects. For ICs with sub-10 nm transistors (10 nm technology node), the design rule (thickness scaling) demands the thinnest possible barrier layer. Therefore, here we investigate the critical thickness of a titanium–nitride (TiN) barrier that can prevent the cobalt diffusion using multi-scale modeling and simulations. First, we compute the Co diffusion barrier in crystalline and amorphous TiN with the nudged elastic band method within first-principles density functional theory simulations. Later, using the calculated activation energy barriers, we quantify the Co diffusion length in the TiN metal layer with the help of kinetic Monte Carlo simulations. Such a multi-scale modelling approach yields an exact critical thickness of the metal layer sufficient to prevent the Co diffusion in IC interconnects. We obtain a diffusion length of a maximum of 2 nm for a typical process of thermal annealing at 400 °C for 30 min. Our study thus provides useful physical insights for the Co diffusion in the TiN layer and further quantifies the critical thickness (~2 nm) to which the metal barrier layer can be thinned down for sub-10 nm ICs.

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“…To solve problems related to double patterning/double etching (2P2E) and RC-delay, TiN hard mask and low-k dielectrics were adopted in advanced nodes of BEOL [1]. TiN removal is required before wet clean to get better Cu filling in 10 nm node [2]. In addition, to get dry etch with high selectivity between TiN and low-k dielectric, a thicker high-density TiN film can prevent misalignment and improve yield for 2P2E process but makes removal more difficult.…”

Section: Introductionmentioning

confidence: 99%

High Throughput Wet Etch Solution for BEOL TiN Removal

Hsu

Wang

et al. 2016

SSP

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Sub-10 nm technology node manufacturing processes may require the use of thicker and denser TiN hard mask for patterning at the BEOL. The modified TiN, which tends to be more chemically robust, must be removed using a wet etch process, while maintaining typical throughput - no extension of typical wet etch process times. To satisfy these needs, a new TiN etching accelerator was found that enhanced the activity of peroxide-related species in a wet etch chemical formulation that achieved increased TiN etch rate relative to formulation without TiN etch rate accelerator (Sample 1), while also minimizing the damage to ultra-low-k inter layer dielectric (ILD) layer by a strong base, also present in the formulation. We report here the result of a solvent based formulation, which adopted the TiN etching accelerator. The formulation was able to maintain TiN etch rate and remove post-etch residue, while remaining selective to ultra-low-k ILD, Co and Cu. The TiN etch rate of the accelerator enhanced formulation can be further tuned by modifying the process temperature or the hydrogen peroxide to formulation mixing ratio and has the potential capability to process > 400 wafers.

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Industrial Challenges of TiN Hard Mask Wet Removal Process for 14nm Technology Node

Cited by 6 publications

References 5 publications

Process Parameter Control for BEOL TiN Hard Mask Etch-Back

Process Parameter Control for BEOL TiN Hard Mask Etch-Back

How thin barrier metal can be used to prevent Co diffusion in the modern integrated circuits?

High Throughput Wet Etch Solution for BEOL TiN Removal

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