Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765) 2003
DOI: 10.1109/iwgi.2003.159207
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In-situ HfSiON/SiO<sub>2</sub> gate dielectric fabrication using hot wall batch system

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Cited by 16 publications
(14 citation statements)
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“…We used HfSiON gate dielectrics fabricated by metalorganic chemical vapor deposition (MOCVD) on p-type Si substrates. 9) The Hf ratio ½Hf=ðHf þ SiÞ of the silicate was 60% and nitrogen incorporation into the films was carried out by NH 3 annealing. The equivalent oxide thickness (EOT) obtained using a conventional poly-Si gate electrode was about 1.3 nm.…”
Section: Methodsmentioning
confidence: 99%
“…We used HfSiON gate dielectrics fabricated by metalorganic chemical vapor deposition (MOCVD) on p-type Si substrates. 9) The Hf ratio ½Hf=ðHf þ SiÞ of the silicate was 60% and nitrogen incorporation into the films was carried out by NH 3 annealing. The equivalent oxide thickness (EOT) obtained using a conventional poly-Si gate electrode was about 1.3 nm.…”
Section: Methodsmentioning
confidence: 99%
“…TaSi x N y gate MOSFETs with HfSiON gate dielectrics were fabricated by a replacement gate process which did not include high temperature processes after the gate metal deposition (< 600 o C) (3). The HfSiON dielectrics were formed by the combination of MOCVD and a plasma-nitridation techniques (4,5).…”
Section: Introductionmentioning
confidence: 99%
“…High-k MIS-FETs were fabricated with a conventional gate-first process. The wire-metal was 50nm W. The gate dielectric was 2.5nm HfSiON giving an effective-oxide-thickness (EOT) of 1.1nm [2,3]. Activation temperatures after gate-formation were 850-1000 o C. TiN and TiSiN metal-gate transistors were fabricated with the same process.…”
Section: Methodsmentioning
confidence: 99%