Improving Total Dose Tolerance of Buried Oxides in SOI Wafers by Multiple-Step &lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;${\hbox {Si}}^ + $&lt;/tex&gt;&lt;/formula&gt; Implantation

Huang, Huixiang; Bi, Dawei; Chen, Ming; Zhang, Yanwei; Wei, Xing; Hu, Zhiyuan; Zhang, Zhengxuan

doi:10.1109/tns.2014.2316017

Cited by 16 publications

(4 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…According to the previous papers, Silicon ions implantation can form silicon nanometer clusters in the box as deep electron traps. While, at the meantime, the implantation also induces amount of shallow electron traps near the Top-Si/BOX inter-face [8]. It can be speculated that this abnormal degradation and huge leakage current is induced by those electron traps.…”

Section: A Low Vg Stressmentioning

confidence: 99%

The Degradation Induced by Hot-Carrier Injection in 130-Nm Partially Depleted Soi Pmosfets Fabricated on Modified Wafer

Zhu¹,

Bi²,

Hu³

et al. 2019

Recent Developments on Information and Communication Technology (ICT) Engineering

Self Cite

View full text Add to dashboard Cite

The hot carrier effect of 130-nm partially depleted SOI pMOSFETs fabricated on wafer modified by silicon ions implantation is reported in this paper. Due to the electron traps in the buried oxide, the degradation induced by hot-carrier injection is anomalous. Specifically, at low Vg stress, the positive degradation of modified pMOSFETs is faster and more serious than control devices, and huge leakage current is found after a period of stress time. Moreover, at a Vg = Vd stress, the control pMOSFETs present lightly negative degradation, while the modified pMOSFETs present enormous positive degradation. Finally, a reasonable interpretation is proposed that the deep electron traps in the buried oxide can capture hot electrons during the stress, which will cause the back channel exhausted even inversed and enhance the coupling effect between the front gate and the back gate.

show abstract

Section: A Low Vg Stressmentioning

confidence: 99%

The Degradation Induced by Hot-Carrier Injection in 130-Nm Partially Depleted Soi Pmosfets Fabricated on Modified Wafer

Zhu¹,

Bi²,

Hu³

et al. 2019

Recent Developments on Information and Communication Technology (ICT) Engineering

Self Cite

View full text Add to dashboard Cite

show abstract

“…It has been confirmed that silicon ion implantation into BOX can effectively improve the TID hardness, which is attributed to the produced deep electron traps with large capture cross section compensating for radiation-induced positive charges. [7][8][9][10][11][12][13][14][15] Properties of radiation-hardened SOI materials fabricated on separation by implantation of oxygen (SIMOX) wafers with Si implantation have been investigated extensively. [12,15,16] However, less is found in the literature regarding the performances of radiation-hardened SOI using UNIBOND wafers, which are much more widely used in the present digital SOI device fabrications.…”

Section: Introductionmentioning

confidence: 99%

“…Moreover, a number of researches about how to acquire radiation-hardened SOI wafers with good quality have been conducted. [7,11,17,18] In this work, we use a single-step Si ion implantation to harden the UNIBOND SOI wafer. Post-implantation annealing is adopted to recover the crystal damage induced by implantation and form the Si nanocrystal at the same time.…”

Section: Introductionmentioning

confidence: 99%

Research on the radiation hardened SOI devices with single-step Si ion implantation

Dai

et al. 2018

Chinese Phys. B

View full text Add to dashboard Cite

Silicon-on-insulator (SOI) devices are sensitive to the total ionizing dose effect due to the existence of buried oxide.In this paper, an extra single-step Si ion implantation into buried oxide layer prior to the normal complementary metaloxide-semiconductor transistor (CMOS) process is used to harden the SOI wafer. The top-Si quality of the hardened SOI wafer is confirmed to be good enough for device manufacturing through various characterization methods. The radiation experiments show that the total ionizing dose tolerance of the Si implanted SOI device is improved significantly. The metastable electron traps introduced by Si implantation is also investigated by electrical stress. The results show that these traps are very instable, and electrons will tunnel into or out of the metastable electron traps quickly after hot-electroninjection or hot-hole-injection.

show abstract

“…The oxygen precipitates with small sizes (<200 nm) would pin the dislocations and then improve the wafer strength. 7,[11][12][13] However, because of the multistep high temperature thermal treatments in the production process of bonded SOI, [14][15][16] the precipitation of oxygen is difficult to be controlled. In addition, during the high voltage power devices manufacturing, the SOI wafers would be subjected to multistep hightemperature processes, such as oxidation, silicon epitaxy, etc.…”

mentioning

confidence: 99%

Investigation on Evolution of Oxygen Precipitates in Bonded SOI Substrate

Gao

Chen³

et al. 2019

ECS J. Solid State Sci. Technol.

Self Cite

View full text Add to dashboard Cite

The bonded silicon-on-insulator (SOI) has emerged as a mature candidate for high voltage power devices. However, because of the multistep thermal treatments in the production process of bonded SOI, its inner oxygen precipitates (OPs) are difficult to be controlled to guarantee the wafer geometric parameters. In this paper, the evolution of OPs in bonded SOI substrate and its effect on wafer expansion have been studied. Compared to traditional bonded SOI manufacture process, an extra thermal treatment has been employed to regulate and control the density and size of OPs in our approach. It is found that compared with the wafers treated by traditional process not only the density of OPs increased significantly, but also the size of OPs could be controlled in the appropriate level. The larger quantity of OPs with proper size results in the reduction of the average expansion of the bonded SOI substrate in photo lithography.

show abstract

Improving Total Dose Tolerance of Buried Oxides in SOI Wafers by Multiple-Step <formula formulatype="inline"><tex Notation="TeX">${\hbox {Si}}^ + $</tex></formula> Implantation

Cited by 16 publications

References 20 publications

The Degradation Induced by Hot-Carrier Injection in 130-Nm Partially Depleted Soi Pmosfets Fabricated on Modified Wafer

The Degradation Induced by Hot-Carrier Injection in 130-Nm Partially Depleted Soi Pmosfets Fabricated on Modified Wafer

Research on the radiation hardened SOI devices with single-step Si ion implantation

Investigation on Evolution of Oxygen Precipitates in Bonded SOI Substrate

Contact Info

Product

Resources

About