Improving the Performance of Static CMOS Gates by Using Independent Bodies

Guerrero, David; Millan, A.; Juan-Chico, J.; Díaz, Manuel Jesús Bellido; Ruiz-de-Clavijo, P.; Ostúa, E.; Viejo, J.

doi:10.1166/jolpe.2007.120

Cited by 1 publication

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“…In order to solve these problems, it has been proposed to make V sb = 0 in every series transistor [5]. To do that, the source and body terminals of every NMOS in a NAND gate, and of every PMOS in a NOR gate are connected together using twinwell and triple-well technologies that provide independent bodies for both types of transistors (Fig.…”

Section: Fig 1 Schematics Of a Two Implementation Of A Nand Gatementioning

confidence: 99%

“…Electric simulations of gates implemented using this technique (called INBO, for Independent Bodies) and using the conventional common-body design style (called COBO, for Common Bodies) have shown remarkable improvements in delay and dynamic power consumption [5] (delay and dynamic power consumption was reduced over 20%). Also, delay and power measurements were more homogeneous across input terminals.…”

Section: Fig 1 Schematics Of a Two Implementation Of A Nand Gatementioning

confidence: 99%

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Static Power Consumption in CMOS Gates Using Independent Bodies

Guerrero

Millan

Juan

et al.

Lecture Notes in Computer Science

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Abstract. It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power enhancements are obtained. Accurate electrical simulation results reveals improvements up to 35% and 62% in NAND and NOR gates respectively.

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Section: Fig 1 Schematics Of a Two Implementation Of A Nand Gatementioning

confidence: 99%

Section: Fig 1 Schematics Of a Two Implementation Of A Nand Gatementioning

confidence: 99%