Proceedings of the 46th Annual Southeast Regional Conference on XX 2008
DOI: 10.1145/1593105.1593217
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Improving code compression using clustered modalities

Abstract: Instruction pressure is the level of time, space, and power required to manage the instruction stream to support highspeed execution of modern multicore general processor and embedded controller based computing. L1 instruction cache and processor pin bandwidth are examples of direct resource costs imposed by the instruction access demand of a processor architecture. This paper explores the potential for reducing instruction pressure through a combination of variable length binary instruction set and Huffman en… Show more

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“…Processor register extensions for collapsed instruction set encoding (PRECISE) are described in [13].…”
Section: Precise: Variable-length Binary Isamentioning
confidence: 99%
“…Processor register extensions for collapsed instruction set encoding (PRECISE) are described in [13].…”
Section: Precise: Variable-length Binary Isamentioning
confidence: 99%