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2017
DOI: 10.1002/pssa.201700511
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Improvement of Channel Mobility of GaN‐MOSFETs With Thermal Treatment for Recess Surface

Abstract: In this work, a thermal treatment technique under NH3 ambient for the recess surface of GaN‐MOSFETs is developed. Immediately following the fabrication process of the recess, the bottoms of these structures have rough surfaces and step‐terrace structures cannot be observed because of the plasma‐induced damage. However, clear step‐terrace structures are formed by the thermal treatment, and the RMS values of the surface roughness decrease from 0.26 to 0.14 nm, which is comparable to those of the as‐grown epitaxi… Show more

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Cited by 8 publications
(6 citation statements)
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“…Since the recessed surface of the AlGaN=GaN films became rough owing to damage caused by ICP-RIE, one recessed sample was annealed in NH 3 ambient to smoothen the rough surface after RIE. 32) All samples for TEM observation were prepared using a focused ion beam (FIB). Subsequently, TEM images with high resolution (e.g., 4000 pixels × 6000 pixels) were obtained using H-9000UHR I (Hitachi).…”
Section: Samplesmentioning
confidence: 99%
“…Since the recessed surface of the AlGaN=GaN films became rough owing to damage caused by ICP-RIE, one recessed sample was annealed in NH 3 ambient to smoothen the rough surface after RIE. 32) All samples for TEM observation were prepared using a focused ion beam (FIB). Subsequently, TEM images with high resolution (e.g., 4000 pixels × 6000 pixels) were obtained using H-9000UHR I (Hitachi).…”
Section: Samplesmentioning
confidence: 99%
“…[35][36][37][38][39] In such cases, however, those adverse effects could be eliminated by thermal treatment. 33) Therefore, R sheet degradation in the recessedgate region could not be measured in deep recessed-gate structures.…”
Section: Resultsmentioning
confidence: 99%
“…Thermal treatment of the etched GaN surface under NH 3 at 740 °C was carried out to remove ICP-RIE damage. 33) After thermal treatment, the root mean square values of surface roughness at the bottoms of the recess structures was less than 0.15 nm. As a gate dielectric, a 30 nm thick silicon dioxide (SiO 2 ) layer was deposited on the GaN layer by the atomic layer deposition method.…”
Section: Device Structure and Fabricationmentioning
confidence: 93%
“…Recessed-gate GaN-metal oxide semiconductor field effect transistors (MOSFETs) have recently been investigated with a view to improving device performance. [5][6][7][8][9][10][11][12] In the fabrication process of recessed-gate MOSFETs, reactive ion etching (RIE) is performed to remove the AlGaN barrier layer in the recessed structure. However, the etched surface causes degradation of performance and reliability of the MOS devices.…”
mentioning
confidence: 99%
“…However, the etched surface causes degradation of performance and reliability of the MOS devices. [9,10,13] Another approach to achieve normally off devices is a selective area regrowth (SAG) technique to enable the formation of the recessed-gate structure without dry etching. [14][15][16][17] Our group recently reported the fabrication of recessed-gate MOSFET without degradation of a gate stack by SAG.…”
mentioning
confidence: 99%