2017
DOI: 10.1088/1361-6463/aa9489
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Improvement in negative bias illumination stress stability of In–Ga–Zn–O thin film transistors using HfO2gate insulators by controlling atomic-layer-deposition conditions

Abstract: The effects of atomic layer deposition (ALD) conditions for the HfO2 gate insulators (GI) on the device characteristics of the InGaZnO (IGZO) thin film transistors (TFTs) were investigated when the ALD temperature and Hf precursor purge time were varied to 200, 225, and 250 °C, and 15 and 30 s, respectively. The HfO2 thin films showed low leakage current density of 10−8 A cm−2, high dielectric constant of over 20, and smooth surface roughness at all ALD conditions. The IGZO TFTs using the HfO2 GIs showed good … Show more

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Cited by 22 publications
(16 citation statements)
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“…Since the the report on transparent and flexible thinfilm transistors (TFTs) using amorphous In-Ga-Zn oxide (a-IGZO) as active channel material [1], extensive investigations have been carried out on this material both in device fabrications [2][3][4][5][6][7] and fundamental research [7][8][9][10][11][12][13][14]. The electronic mobility in a-IGZO based TFT is far larger than that in amorphous Si:H based device [1,7].…”
Section: Introductionmentioning
confidence: 99%
“…Since the the report on transparent and flexible thinfilm transistors (TFTs) using amorphous In-Ga-Zn oxide (a-IGZO) as active channel material [1], extensive investigations have been carried out on this material both in device fabrications [2][3][4][5][6][7] and fundamental research [7][8][9][10][11][12][13][14]. The electronic mobility in a-IGZO based TFT is far larger than that in amorphous Si:H based device [1,7].…”
Section: Introductionmentioning
confidence: 99%
“…The devices showed slight dispersion of capacitance values due to the differences in dielectric constants depending on the ALD temperatures. The capacitance at an accumulation region increased as increases in ALD temperature owing to the increment of dielectric constant of the HfO 2 film [22]. Thickness variations might also influence on the capacitance dispersions, even though we calibrated the film thickness considering the deposition rate depending on the ALD temperature.…”
Section: Methodsmentioning
confidence: 99%
“…For the dielectric layer this is achieved by optimising the deposition process. For example, it has been shown that higher temperature (250 C) ALD deposited dielectric produced more stable devices than identically fabricated devices with lower temperature (200 C) ALD dielectric 269 .…”
Section: Control Of Mechanisms That Lead To Device Instabilitymentioning
confidence: 99%