Improved sub-10-nm CMOS devices with elevated source/drain extensions by tunneling si-selective-epitaxial-growth

Wakabayashi, Hitoshi; Tatsumi, Toru; Ikarashi, Nobuyuki; Oshida, Makiko; Kawamoto, H.; Ikezawa, N.; Ikezawa, T.; Yamamoto, Tetsuya; Hane, M.; Mochizuki, Yasuhiro; Mogami, T.

doi:10.1109/iedm.2005.1609290

Cited by 6 publications

(4 citation statements)

References 2 publications

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“…This value for C s was estimated from the measured I − V g plots in sub 10 nm devices [see ref and references therein] using the relation C s ≈ C ox ( m − 1) where m is the measured body factor and C ox is the capacitance of the ordinary oxide insulator used in the gate.…”

Section: Referencesmentioning

confidence: 99%

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

2007

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It is well-known that conventional field effect transistors (FETs) require a change in the channel potential of at least 60 mV at 300 K to effect a change in the current by a factor of 10, and this minimum subthreshold slope S puts a fundamental lower limit on the operating voltage and hence the power dissipation in standard FET-based switches. Here, we suggest that by replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation. The voltage transformer action can be understood intuitively as the result of an effective negative capacitance provided by the ferroelectric capacitor that arises from an internal positive feedback that in principle could be obtained from other microscopic mechanisms as well. Unlike other proposals to reduce S, this involves no change in the basic physics of the FET and thus does not affect its current drive or impose other restrictions.

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Section: Referencesmentioning

confidence: 99%

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

2007

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“…One of the promising techniques for the realization of an ultra shallow junction is the raised-extension structure formed by in situ doped selective epitaxial growth (SEG). [1][2][3][4] This enables an abrupt change in the dopant profile at the interface of the junction, because dopant diffusion due to ion implantation and activation annealing are absent in the process.…”

Section: Introductionmentioning

confidence: 99%

Atmospheric In situ Arsenic-Doped SiGe Selective Epitaxial Growth for Raised-Extension N-type Metal–Oxide–Semiconductor Field-Effect Transistor

Ikuta

Miyanami²,

Fujita³

et al. 2007

jjap

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We have investigated the AsH3 and GeH4 flow rate dependences of As concentration and growth rate for atmospheric in situ As-doped SiGe selective epitaxial growth. A high As concentration of 3.2×1019 atoms/cm3 and a high growth rate of 13 nm/min were achieved for Si0.79Ge0.21 selective epitaxial growth. The good selectivity was confirmed, and the epitaxial film showed high crystalline quality, a smooth surface and an abrupt change in the dopant profile at the interface. These results were interpreted in terms of the suppression of As surface segregation and the enhancement of As diffusion due to Ge incorporation in Si growth.

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“…Reducing the extension junction depth and the raised extension structure are effective approaches for suppressing SCE. The in situ doped selective epitaxial growth (SEG) process has been investigated as a method for producing such structures [1][2][3][4]. This process produces an abrupt dopant profile at the junction interface since it does not use activation annealing.…”

Section: Introductionmentioning

confidence: 99%

Heavy arsenic doping of silicon grown by atmospheric pressure selective epitaxial chemical vapor deposition

Ikuta

Miyanami²,

Fujita³

et al. 2007

Science and Technology of Advanced Materials

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Selective epitaxial Si with a high arsenic concentration of 2.2 Â 10 19 atoms/cm 3 was deposited at a high growth rate of 3.3 nm/min under atmospheric pressure. It was confirmed that this method had excellent selectivity and produced films having good crystalline quality, abrupt dopant profiles at the interfaces, and smooth surfaces. The growth mechanism is discussed in terms of the relationship between the effects of arsenic surface segregation and etching by hydrogen chloride. r

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Improved sub-10-nm CMOS devices with elevated source/drain extensions by tunneling si-selective-epitaxial-growth

Cited by 6 publications

References 2 publications

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

Atmospheric In situ Arsenic-Doped SiGe Selective Epitaxial Growth for Raised-Extension N-type Metal–Oxide–Semiconductor Field-Effect Transistor

Heavy arsenic doping of silicon grown by atmospheric pressure selective epitaxial chemical vapor deposition

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