Improved Retention Characteristics of Z<sup>2</sup>-FET Employing Half Back-Gate Control

Kwon, Sehyun; Navarro, C.; Gamiz, F.; Galy, Philippe; Cristoloveanu, S.; Kim, Y. T.; Ahn, Jinho

doi:10.1109/ted.2021.3053514

Cited by 3 publications

(3 citation statements)

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“…Trap-assisted tunneling [39] and especially carrier generation through Shockley-Read-Hall (SRH) process at the anode-body junction [40] seem to be the main limiting factors to extending the retention time. Some techniques have been explored to improve it, for example the half-ground-plane Z 2 -FET [41] or the double ground-plane (Figure 3a).…”

Section: Dynamic Memory Cell: Operation As Capacitorless Drammentioning

confidence: 99%

A Review of Sharp-Switching Band-Modulation Devices

et al. 2021

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This paper reviews the recently-developed class of band-modulation devices, born from the recent progress in fully-depleted silicon-on-insulator (FD-SOI) and other ultrathin-body technologies, which have enabled the concept of gate-controlled electrostatic doping. In a lateral PIN diode, two additional gates can construct a reconfigurable PNPN structure with unrivalled sharp-switching capability. We describe the implementation, operation, and various applications of these band-modulation devices. Physical and compact models are presented to explain the output and transfer characteristics in both steady-state and transient modes. Not only can band-modulation devices be used for quasi-vertical current switching, but they also show promise for compact capacitorless memories, electrostatic discharge (ESD) protection, sensing, and reconfigurable circuits, while retaining full compatibility with modern silicon processing and standard room-temperature low-voltage operation.

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Section: Dynamic Memory Cell: Operation As Capacitorless Drammentioning

confidence: 99%

A Review of Sharp-Switching Band-Modulation Devices

et al. 2021

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“…Although 1T-DRAM has been realized through novel architectures such as partially depleted Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field Effect Transistor (MOS-FET) [10], ultra-thin buried oxide (BOX) MOSFET [11,12], conventional double gate (DG) MOSFET [7], tunnel FETs [13][14][15][16][17], junctionless transistor [18][19][20][21], dopingless MOSFET [22,23], advanced random access memory (ARAM) [24] and its improved version (A2RAM) [25], zero-slope zero-impact ionization FET [26,27], raised source/drain MOSFET [28], electron-bridge channel structure [29] and vertical FET with body-on-gate structure [30]. In addition, material-device codesign has also been explored for 1T-DRAM such as GaAs junctionless transistor [31], SiGe impact ionisation MOS-FET [32], Ge/GaAs heterojunction tunnel FET [33] and SiGe quantum well structure [34].…”

Section: Introductionmentioning

confidence: 99%

Enhancing multi-functionality of reconfigurable transistors by implementing high retention capacitorless dynamic memory

Bhuvaneshwari

Kranti

2021

Semicond. Sci. Technol.

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A key indicator of multi-functional attributes of a transistor is technological competiveness vis-à-vis existing architectures. Apart from the well-known logic circuit implementation through reconfigurable field effect transistors (RFETs), this work showcases feasible memory operation by realising capacitorless (1T) dynamic random access memory (DRAM). The memory operation in RFET is achieved through back control gate which creates an electrostatic potential well to store holes. Due to the inherent features of RFET architecture a wider and deeper potential well results in a significantly high retention time (RT) of 2.3 s at 85 • C for a total length of 90 nm. Apart from high retention, RFET based 1T-DRAM exhibits a low write time of ∼2 ns, sense margin (SM) of ∼76 µA µm −1 and a high current ratio (CR) of ∼10 5 . Benchmarking the performance metrics against previously published results indicates competitiveness for RT in terms of total length, storage volume and high temperature operation. Critical insights aiding competitive multi-functional behaviour through 1T-DRAM highlights the possible implementation of logic and memory blocks with RFETs.

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“…29) Therefore, we will investigate energy band modulation mechanism of memory operations and SS characteristics of the single transistor DRAM cell devices. 30) The band modulation FET consists of the gated and ungated regions on the top of intrinsic silicon on oxide (SOI) body and the back gate on the bottom of buried oxide (BOX). A part of the body near the P + drain is covered with top electrode, which is the gated length (L G ) and the rest part of the body is remained without top electrode, which is the ungated length (L IN ).…”

Section: Introductionmentioning

confidence: 99%

Characteristics of band modulation FET on sub 10 nm SOI

Kwon

Navarro

Gamiz

et al. 2019

Jpn. J. Appl. Phys.

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The electrical characteristics of band modulation FET are investigated with energy band diagrams between drain to source through intrinsic gate region according to front/back gates and drain bias conditions. The drain current–voltage and transfer characteristics show extremely steep slope with minimum subthreshold swing of 1.6 mV/decade. Memory window is 0.27 V, which is determined with turn on voltages at “0” and “1” states through multiple cycles of write and read operations. Memory performance also shows that current margin to distinguish the “0” and “1” state has the maximum value of over 100 μA at VD of 1.2 V. But, the current margin is relatively less affected by the front and back gate bias under the conditions that VD is applied in the memory window range and the current at “0” state remains low.

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Improved Retention Characteristics of Z²-FET Employing Half Back-Gate Control

Cited by 3 publications

References 13 publications

A Review of Sharp-Switching Band-Modulation Devices

A Review of Sharp-Switching Band-Modulation Devices

Enhancing multi-functionality of reconfigurable transistors by implementing high retention capacitorless dynamic memory

Characteristics of band modulation FET on sub 10 nm SOI

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Improved Retention Characteristics of Z2-FET Employing Half Back-Gate Control

Cited by 3 publications

References 13 publications

A Review of Sharp-Switching Band-Modulation Devices

A Review of Sharp-Switching Band-Modulation Devices

Enhancing multi-functionality of reconfigurable transistors by implementing high retention capacitorless dynamic memory

Characteristics of band modulation FET on sub 10 nm SOI

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Improved Retention Characteristics of Z²-FET Employing Half Back-Gate Control