Improved analytical model for performance evaluation of crosspoint‐queued switch under uniform traffic

Gao, Ya; Pan, Wei; Liu, Zheng

doi:10.1049/iet-net.2017.0016

Cited by 6 publications

(1 citation statement)

References 25 publications

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“…Moutp represents the total number of HOL cells destined to an output outp in certain time slot ti. At all the VOQs, the overall number of HOL cells blocked at the input ports in ti is: Using the equation of the mean value in Appendix A of [17] we obtain:…”

Section: S Sb Br Rg G T Th Hr Ro Ou Ug Gh Hp Pu Ut Tmentioning

confidence: 99%

The Single Bit Request Grant (SBRG) Scheduling Algorithm for Input-Queued ATM Switches

Said

El-Saghir

El-Fishawy

2020

Menoufia Journal of Electronic Engineering Research

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In this paper, we propose an efficient singleiteration single-bit request scheduling algorithm for input-queued ATM switches that based on a new arbitration technique called the Single Bit Request Grant (SBRG) algorithm. The operation of the SBRG depends on the concept known as "the preferred inputoutput pairs first", and the arbitration requests starts from switch output ports to reduce the number of issued request signals. Compared to other single-iteration algorithms, simulation results show that the SBRG maximizes the match size and improves the switch delay/throughput performance, especially when the load increases. Also, the proposed algorithm reduces the complexity of some of the existing algorithms by decreasing the number of input-output transferred messages, and by the absence of any encoding/decoding mechanism that can be used in some existing algorithms to reduce the size of request signals to one bit. Keywords-Input-queued ATM switch, single iteration scheduling algorithm, single-bit request scheduling algorithm. 1 1.. I In nt tr ro od du uc ct ti io on n Cloud computing architectures provide users with access to applications and services stay in shared server domains through the Internet [1], [2]. IP traffic is transferred in huge amounts between users and server domains, and among too many servers in each domain. Most server domains have storage area networks. These networks facilitate data transfer among disk matrices and the hundreds of servers within different data centers. Networks within data centers have many types, and they must use switches that are characterized by their high speed and low latency to achieve efficient data communication among the elements of these networks [3], [4]. There are many types of switch architectures that are used for data communications in ATM networks. The traditional output queuing switches can achieve a 100% throughput under any traffic load, but it requires high internal speed, which makes it impractical to be built in hardware, especially for large port numbers. In contrast, the switches that based on input queuing operates with an

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Section: S Sb Br Rg G T Th Hr Ro Ou Ug Gh Hp Pu Ut Tmentioning

confidence: 99%