Implementation of the high order overlay control for mass production of 40nm node logic devices

Umeda, Daisuke; Miyasaka, Mami; Uchiyama, Takayuki

doi:10.1117/12.813378

Cited by 1 publication

(1 citation statement)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…So the several methods are applied for overlay improvement such as HOWA (High Order Wafer Align), HOPC (High Order Process Correction) and i-HOPC (Intra field High Order Process Correction). [1][2][3][4] Until recently, the alignment and overlay data are modeled in linear model because it is possible to satisfy the overlay control. However as the overlay requirement getting more demanding as the design rule shrinks, many research have been presented that advanced alignment and overlay control methods are needed to reduce the residual errors in the conventional linear model.…”

Section: Introductionmentioning

confidence: 99%

Improvement of the process overlay control for sub-40-nm DRAM

Park¹,

Lee²,

Shin³

et al. 2010

SPIE Proceedings

View full text Add to dashboard Cite

In recent years, DRAM technology node has shrunk below to 40nm HP (Half Pitch) patterning with significant progresses of hyper NA (Numerical Aperture) immersion lithography system and process development. Especially, the development of DPT (Double Patterning Technology) and SPT (Spacer Patterning Technology) can extend the resolution limit of lithography to sub 30nm HP patterning. However it is also necessary to improve the tighter overlay control for developing the sub 40nm DRAM because of small device overlap margin. Since new process technologies such as complex structure of DPT and SPT, new hard mask material and extreme CMP (Chemical Mechanical Planarization) process have also applied as design rule is decreased, the improvement of process overlay control is very important. In this paper, we have studied that the characterization of overlay performance for sub 40nm DRAM with actual experimental data. First, we have investigated the influence on the intra field overlay and inter field overlay with comparison of HOWA and HOPC and the improvement of inter field overlay residual errors. Then we have studied the process effects such as hard mask material, thermal process and CMP process that affect to overlay control. .

show abstract

Section: Introductionmentioning

confidence: 99%