Implementation of recursive digital filters into vector SIMD DSP architectures

Robelly, J.P.; Cichon, Gordon; Seidel, H.; Fettweis, Gerhard

doi:10.1109/icassp.2004.1327073

Cited by 22 publications

(17 citation statements)

References 3 publications

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“…As for the parallel architectures, Robelley et al [52] presented a mathematical formulation for computing time-invariant recursive filters on general SIMD DSP architectures. Authors also discuss the speed-up factor regarding to the level of parallelism and the filter order.…”

Section: Parallel Architecturesmentioning

confidence: 99%

Algorithms for Efficient Computation of Convolution

Karas¹,

Svoboda²

2013

Design and Architectures for Digital Signal Processing

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Section: Parallel Architecturesmentioning

confidence: 99%

Algorithms for Efficient Computation of Convolution

Karas¹,

Svoboda²

2013

Design and Architectures for Digital Signal Processing

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“…Thus, and according to [17], we can write for the Kronecker vector formulation of the algorithm the following…”

Section: Application Examplementioning

confidence: 99%

“…In [17], we presented a block formulation of pure recursive filters using Kronecker vector factors. The block formulation was derived using a lifting-isomorphism [18] with a raising factor N applied to the state-space equations of the serial formulation of the recursive filter.…”

Section: Application Examplementioning

confidence: 99%

A HW/SW design methodology for embedded SIMD vector signal processors

Robelly

Cichon

Ahlendorf

et al. 2008

IJES

Self Cite

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Abstract-SIMD processors have made their way from supercomputers architectures through embedded real-time signal processing. This trend has been driven by signal processing applications with heavy number-crunching requirements like for example base-band processing on mobile devices.Depending on the data dependencies of algorithms and implementation constraints like real-time, power consumption and die size, the necessary SIMD parallelism can be put into a piece of silicon for a certain application. This poses two challenges: On the one hand, the DSP core design has to be streamlined in such a way that changes on the architecture can be prototyped very fast. On the other hand, the algorithm design and its development have to be done independent of the level of SIMD parallelism available on the DSP in order to enable software reusability.In this paper we report our HW/SW methodology in order to design DSP cores and algorithms that exploit SIMD parallelism. On the hardware development side and taking as a starting point a novel hardware architectural template called STA 1 , we explain how with our approach we automatically generate simulation and hardware models of DSP cores with a scalable level of SIMD parallelism. On the software development side and based on an algebraic model that captures the SIMD computational model, we explain how algorithms can be designed independent of the available SIMD parallelism. We also report how this algebraic model can be easily expressed in Matlab syntax. This enables the automatic code generation from Matlab programs for our family of DSP cores.

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“…Thus, and according to [5], we can write for the Kronecker vector formulation of the algorithm the following…”

Section: Application Example 2:tensor Product Representation Of Rmentioning

confidence: 99%

“…In [5], we presented a block formulation of pure recursive filters using Kronecker vector factors. The block formulation was derived using a lifting-isomorphism [6] with a raising factor N applied to the state-space equations of the serial formulation of the recursive filter.…”

Section: Application Example 2:tensor Product Representation Of Rmentioning

confidence: 99%

Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach

Robelly¹,

Cichon²,

Seidel³

et al.

Parallel Computing in Electrical Engineering, International Conference On

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Abstract-Driven by the ever increasing algorithm complexity on the field of mobile communications systems, SIMD DSP architectures have emerged as an approach that offers the necessary processing power at reasonable levels of die size and power consumption. However, this kind of DSP architectures imposes new challenges for programmers, since algorithms have to be designed to exploit the available parallelism on the processor. Taking as a starting point an algebraic framework that captures the SIMD computational model, we report in this paper about our efforts to design and automatically generate object code for our family of DSP architectures independent of the available SIMD parallelism. We show how these algebraic structures can be used as a high level programming language that offers a unified approach to design and describe algorithms using SIMD parallelism. Moreover, we show how these algebraic structures offer concise rules for the automatic code generation.

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Implementation of recursive digital filters into vector SIMD DSP architectures

Cited by 22 publications

References 3 publications

Algorithms for Efficient Computation of Convolution

Algorithms for Efficient Computation of Convolution

A HW/SW design methodology for embedded SIMD vector signal processors

Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach

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