Implementation of Elliptic Curve Cryptosystems on a reconfigurable computer

Abstract

Abstract. During the last few years, a considerable effort has been devoted to the development of reconfigurable computers, machines that are based on the close interoperation of traditional microprocessors and Field Programmable Gate Arrays (FPGAs). Several prototype machines of this type have been designed, and demonstrated significant speedups compared to conventional workstations for computationally intensive problems, such as codebreaking. Nevertheless, the efficient use and programming of such machines is still an unresolved problem. In this paper, we demonstrate an efficient implementation of an Elliptic Curve scalar multiplication over GF(2 m ), using one of the leading reconfigurable computers available on the market, SRC-6E. We show how the hardware architecture and programming model of this reconfigurable computer has influenced the choice of the algorithm partitioning strategy for this application. A detailed analysis of the control, data transfer, and reconfiguration overheads is given in the paper, together with the performance comparison of our implementation against an optimized microprocessor implementation.

Customizable elliptic curve cryptosystems

“…Previous hardware work includes: the first ASIC implementation with Motorola M68008 microcontroller [1], reconfigurable finite-field multiplier [22], ASIC designs for field operations over specific fields [29], an ECC implementation on the 8051 microprocessor in smart cards [53], an ECC processor on a smart card device [43], and recent FPGA implementations for ECC designs including [5], [6], [17], [24], [25], [28], [36], [39]- [41]. In this paper, we aim at optimising the field multiplier for normal basis and adopting state-of-the-art algorithm for point multiplication, to build a customisable and efficient ECC cryptosystem.…”

“…ECC has been adopted to a wide spectrum of applications from digital certificates in webserver authentication [36] to embedded processors [51] in wearable devices.…”

Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis

“…They achieved an order of magnitude speedup gain for on-board preprocessing of hyperspectral imagery with an implementation of the automatic wavelet dimension reduction algorithm on the SRC-6. Other application efforts related to the SRC-6 system include an implementation of the DARPA Boolean equation benchmarking suite [16], implementation studies of Triple DES [17], and algorithm implementations for an elliptic curve cryptosystem [18] and a generic wavelet filter [19]. Other research highlighting the system and architecture of the SRC-6 includes a thorough discussion by El-Araby et al on the optimizations used in designing for RC, specifically the SRC-6E [20].…”

Reconfigurable Elliptic Curve Cryptosystems on a Chip

“…System level work has also been reported such as a secure web server [6] and a reconfigurable computer [7]. In this paper, we build a flexible CSoC using configurable logic and embedded processors, and apply it to applications such as a secure web server system.…”

“…ECC has been adopted in a wide variety of applications from digital certificates in webserver authentication [6] to embedded processors in wearable devices. A major trend of research work is hardware acceleration, and some recent work addresses system integration [6,7] using the PCI interface and proprietary interconnect. In this paper we propose an SoC approach and evaluate the effect of partitioning in a single chip.…”