Implementation of a reduced-lattice MIMO detector for OFDM Systems

Abstract

This paper presents a novel VLSI implementation of a MIMO detector for OFDM systems. The proposed architecture is able to perform both linear MMSE and reduced latticeaided MIMO detection, making it possible to adjust the balance between performance and power consumption. In order to facilitate real-time detection in reduced lattice mode of operation, a novel fixed-complexity version of the LLL lattice reduction algorithm has been developed, allowing for strict practical timing requirements, such as those specified for new generation IEEE 802.11n wireless LAN systems, to be met. An implementation of the MIMO detector for a system employing up to 4 transmit and receive antennas is described and its complexity and performance are evaluated.

Experimental Evaluation of an IEEE 802.11n Wireless LAN System Employing Lattice Reduction Aided MIMO Detection

“…A practical implementation of the pseudo-inverse can be realized by means of a QR decomposition H e + = QR, yielding the rightmost expression in the equality (2). For simplicity, the normalizations E |x m | 2 = E |h n,m | 2 = 1 have been assumed.…”

“…A detailed description of the architecture, timing requirements and fixed-point evaluation results is available in [2].…”

“…The proposed solution belongs to the family of reduced-lattice (RL) detectors [3], [4], whereby enhanced performance is achieved via a transformation of the MIMO channel prior to conventional detection. This paper presents the experimental evaluation results for an 802.11n hardware prototype equipped with the RL-MMSE detector described in [2], and compares its performance with that of conventional MMSE detection in a real-life wireless LAN scenario.…”

“…In order to address these problems, a novel architecture for MIMO detection, able to produce near-optimal results with only a moderate increase in complexity, was presented in [2]. The proposed solution belongs to the family of reduced-lattice (RL) detectors [3], [4], whereby enhanced performance is achieved via a transformation of the MIMO channel prior to conventional detection.…”

A Digital Signal Processing Architecture for Soft-Output MIMO Lattice Reduction Aided Detection

“…Several works [30,31] make use of systolic arrays in their implementation. This requires careful scheduling to maximize component utilization.…”