Implementation of a linear histogram BIST for ADCs

Azaïs, Florence; Bernard, Serge; Bertrand, Y.; Renovell, Michel

doi:10.1109/date.2001.915083

Cited by 47 publications

(43 citation statements)

References 8 publications

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“…Bernard Gordon, at Epsco, introduced the first commercial vacuum-tube SAR ADC in 1954; an 11-bit, 50-kSPS ADC that dissipated 500 W. 1 The principle of the SAR consists of a sample-and-hold (S/H) circuit, a comparator, a DAC and a logic control unit. ADC employs a binary search algorithm that uses the digital logic circuitry to determine the value of each bit in a sequential or successive manner based on the outcome of the comparison between the outputs of the S/H circuit and DAC feedback from a capacitor array [9]. Figures 2 and 3 illustrate a block diagram of the SAR and the successive approximation conversion procedure, respectively [10].…”

Section: Sar Conversion Principlementioning

confidence: 99%

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

Mansour¹,

Maghrebi²,

Sifi³

et al. 2017

Int. J. Metrol. Qual. Eng.

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Abstract. This paper presents an implementation of a data acquisition system for analog-to-digital converters (ADCs) using "Laboratory Virtual Instrument Engineering Workbench (LabVIEW)" as software for data analysis. The designed and implemented platform allows interaction with the device under test through means of data acquisition and instrument controls. Developing custom tests in LabVIEW can result in reduced test time, which in turn will help reduce costs in testing. This system was developed for evaluation purposes of ADC's static and dynamic parameters (gain error, offset error, DNL, INL, SNR, SINAD, IMD, etc.) using single and multifrequency signals. The virtual control and analysis instrument was created in "LabVIEW" environment to control test signals generation and data acquisition. The testing performance of the platform is demonstrated using the classical ADC circuit "ADC0804". A comparison with experimental results obtained by CANTEST platform from Bordeaux University (France) is also presented to highlight our platform.

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Section: Sar Conversion Principlementioning

confidence: 99%

Design and implementation of a platform for experimental testing and validation of analog-to-digital converters: static and dynamic parameters

Mansour¹,

Maghrebi²,

Sifi³

et al. 2017

Int. J. Metrol. Qual. Eng.

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“…3 implements the concept proposed in [17] with some additional improvements in order to completely automate the evaluation of the DNL and INL parameters. The BIST structure is composed of three basic blocks: detector module, exploitation module and control module.…”

Section: Sequential Bist Approachmentioning

confidence: 99%

“…Novel approach based on small-amplitude waves is proposed in [13] and further revised in [14]. Papers [15][16][17] focus on implementation of histogram based test of ADCs in a BIST arrangement. In general, a complete BIST scheme requires the definition of a reference analog input generator and digital output response analyzer.…”

Section: Previous Workmentioning

confidence: 99%

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Measuring Static Parameters of Embedded ADC Core

Novak¹,

Mrak²,

Biasizzo³

2011

Journal of Electrical Engineering

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The paper presents the results of a feasibility study of measuring static parameters of ADC cores embedded in a Systemon-Chip. Histogram based technique is employed because it is suitable for built-in self-test. While the theoretical background of the technique has been covered by numerous papers, less attention has been given to implementations in practice. Our goal was the implementation of histogram test in a IEEE Std 1500 wrapper. Two different solutions pursuing either minimal test time or minimal hardware overhead are described. The impact of MOS switches at ADC input on the performed measurements was considered.K e y w o r d s: ADC static parameters, histogram based test, built-in self-test, system-on-chip

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“…To overcome these problems, several authors have proposed different BIST techniques where signals are internally generated and/or analysed [1][2][3][4][5][6][7]. Another possible and less expensive solution consists in using DFT techniques to internally transform the analogue signals into digital signals that are made controllable and observable from the chip I/Os [3,8,9].…”

Section: Introductionmentioning

confidence: 99%