Parkinson’s disease (PD) is treated by medication, less with deep brain stimulation and physiotherapy. Different opinions on the clinical meaningfulness of the physiotherapy or recommended intensive physiotherapy were found. Our objectives were to design intensive target-based physiotherapy for upper extremities suitable for telerehabilitation services and examine the clinical meaningfulness of the exergaming at an unchanged medication plan. A telerehabilitation exergaming system using the Kinect sensor was developed; 28 patients with PD participated in the study. The system followed the participants’ movements and adapted the difficulty level of the game in real time. The outcomes of the study showed that seven out of 26 participants could set up the equipment at home alone. Clinical outcomes of Box and Blocks Test (mean: 47 vs. 52, P=0.002, Cohen’s d=0.40), UPDRS III (mean: 27 vs. 29, P=0.001, d=0.22), and daily activity Jebsen’s test; writing a letter (mean: 24.0 vs. 20.6, P=0.003, d=0.23); and moving light objects (mean: 4.4 vs. 3.9, P=0.006, d=0.46) were statistically significant (P<0.05) and considered clinically meaningful. The Nine-Hole Peg Test showed a statistically nonsignificant improvement (mean: 28.0 vs. 26.5, P=0.089, d=0.22). The participants claimed problems with mobility but less with activities of daily living and emotional well-being (PDQ-39). The findings lead to preliminary conclusions that exergaming is feasible, but may require technical assistance, whereas clinically meaningful results could be achieved according to validated instruments and an unchanged medication plan in individuals with PD.
Abstract. An error-recovery method for embedded multi-processor systems on SRAM-based FPGAs is proposed. This method is effective against soft-errors in the configuration memory, such as the errors caused by hIgh energy radiation also known as Single Event Upsets. The error-recovery algorithm performs on-line test of the ~PGA configuration memory and recovers errors using dynamic partial reconfiguration. Processor cores perform a dIstributed recovery procedure. If a failure occurs in the processor currently runOing the recovery algOrithm, another processor core takes the role and performs reconfiguration. Presented case study demonstrates the advantage of the proposed approach.
The application of SRAM-based field-programmable gate arrays (FPGAs) in mission-critical systems requires errormitigation and recovery techniques to protect them from the errors caused by high-energy radiation, also known as single event upsets (SEUs). For this, modular redundancy and runtime partial reconfiguration are commonly employed techniques. However, the reported solutions feature different tradeoffs in the area overhead and the fault latency. In this paper, we propose a low area-overhead SEU recovery mechanism and describe its application in different self-recoverable architectures, which are experimentally evaluated using a specially designed fault-emulation environment. The environment enables the user to inject faults at selected locations of the configuration memory and experimentally evaluate the reliability of the developed solutions.
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