Impacts of plasma process-induced damage on ultra-thin gate oxide reliability

Eriguchi, Koji; Yamada, Takayuki; Kosaka, Y.; Niwa, Miki

doi:10.1109/relphy.1997.584257

Cited by 12 publications

(6 citation statements)

References 20 publications

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“…The SILC is more evident in thinner oxides and attributed to trap assisted tunnelling. The increase in the gate leakage current in figure 3(b) is due to the increase in the number of trap sites for the electron tunnelling by the antenna effect [43].…”

Section: Characterization Techniques and The Basicsmentioning

confidence: 97%

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Eriguchi

Ono

2008

J. Phys. D: Appl. Phys.

122

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Two plasma process-induced damage mechanisms are investigated in detail: charging damage by plasma conduction current through two different gate dielectrics (SiO2 and HfAlOx/SiO2 (high-k)) in metal-oxide semiconductor (MOS) devices and ion-bombardment damage in Si surfaces. The charging damage was identified as the changes in tunnelling currents and the decrease in the reliability lifetime. The behaviours were found to depend on the dielectric thickness as well as dielectric materials (SiO2 and high-k). For p-ch MOS transistors, the threshold voltage of devices with high-k exposed to Ar-based plasma shifted towards the positive direction, while with SiO2, towards the negative direction. This may be attributed to the difference in the trap site generation process and trapping phenomenon. With regard to the ion-bombardment damage, the changes in optical structures (surface layer thicknesses, dielectric function and mechanical strain within the interfacial damaged layers) by direct current and electron cyclotron resonance plasma exposures were investigated by spectroscopic ellipsometry and photoreflectance spectroscopy. The plasma-induced stressing current and the defect density were estimated to quantify the damage. The experimental findings provide key implications that a plasma-induced damage is one of the limiting factors for future-scaled device designs.

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Section: Characterization Techniques and The Basicsmentioning

confidence: 97%

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Eriguchi

Ono

2008

J. Phys. D: Appl. Phys.

122

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“…7(a), the trapped-charge-induced V t shift is more predominant than the change in subthreshold swing; thus, we focus on the charge trapping phenomenon in High-k. Since plasma is considered to be a constantcurrent source in terms of charging damage, 12,[38][39][40] the CCS test was performed. The decrease in a linear region peak transconductance (Ág mmax ) versus the V t shift under CCS is investigated in detail for n-channel MOSFETs with SiO 2 for the purpose of simplifying the polarity of plasma conduction currents.…”

Section: Al-probing Pad Antennamentioning

confidence: 99%

Comparative Study of Plasma Source-Dependent Charging Polarity in Metal–Oxide–Semiconductor Field Effect Transistors with High-k and SiO₂ Gate Dielectrics

Eriguchi

Kamei

Hamada

et al. 2008

jjap

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Friction is ubiquitous in all aspects of everyday life and has consequently been under study for centuries. Classical theories of friction have been developed and used to successfully solve numerous tribological problems. However, modern applications that involve advanced materials operating under extreme environments can lead to situations where classical theories of friction are insufficient to describe the physical responses of sliding interfaces. Here, we review integrated experimental and computational studies of atomic-scale friction and wear at solid-solid interfaces across length and time scales. The influence of structural orientation in the case of carbon nanotube bundles, and molecular orientation in the case of polymer films of polytetrafluoroethylene and polyethylene, on friction and wear are discussed. In addition, while friction in solids is generally considered to be athermal, under certain conditions thermally activated friction is observed for polymers, carbon nanotubes and graphite. The conditions under which these transitions occur, and their proposed origins, are discussed. Lastly, a discussion of future directions is presented.

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“…But, it is ruled out because only insignificant and bias-insensitive degradation has been found at low substrate bias regime, which obviously contradicts with the fact that plasma-induced "latent" defects can be easily retriggered even under traditional constant voltage stress, i.e., V [11]. As is well known, trap filling of the as-fabricated defects in plasma-nitrided oxide, which were speculated to be located near valence band [12], could account for the slightly larger shift in the low substrate bias range.…”

Section: Resultsmentioning

confidence: 98%

Enhanced negative substrate bias degradation in nMOSFETs with ultrathin plasma nitrided oxide

Perng

Chien²,

Chen

et al. 2003

IEEE Electron Device Lett.

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The degradation induced by substrate hot electron (SHE) injection in 0.13-m nMOSFETs with ultrathin ( 2.0 nm) plasma nitrided gate dielectric was studied. Compared to the conventional thermal oxide, the ultrathin nitrided gate dielectric is found to be more vulnerable to SHE stress, resulting in enhanced threshold voltage ( ) shift and transconductance ( ) reduction. The severity of the enhanced degradation increases with increasing nitrogen content in gate dielectric with prolonged nitridation time. While the SHE-induced degradation is found to be strongly related to the injected electron energy for both conventional oxide [1], [2] and plasma-nitrided oxide, dramatic degradation in threshold voltage shift for nitrided oxide is found to occur at a lower substrate bias magnitude ( 1 V), compared to thermal oxide ( V). This enhanced degradation by negative substrate bias in nMOSFETs with plasma-nitrided gate dielectric is attributed to a higher concentration of paramagnetic electron trap precursors introduced during plasma nitridation [3].Index Terms-Paramagnetic electron trap, plasma nitrided gate dielectric, substrate hot electron.

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Impacts of plasma process-induced damage on ultra-thin gate oxide reliability

Cited by 12 publications

References 20 publications

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Comparative Study of Plasma Source-Dependent Charging Polarity in Metal–Oxide–Semiconductor Field Effect Transistors with High-k and SiO₂ Gate Dielectrics

Enhanced negative substrate bias degradation in nMOSFETs with ultrathin plasma nitrided oxide

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Impacts of plasma process-induced damage on ultra-thin gate oxide reliability

Cited by 12 publications

References 20 publications

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices

Comparative Study of Plasma Source-Dependent Charging Polarity in Metal–Oxide–Semiconductor Field Effect Transistors with High-k and SiO2 Gate Dielectrics

Enhanced negative substrate bias degradation in nMOSFETs with ultrathin plasma nitrided oxide

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Comparative Study of Plasma Source-Dependent Charging Polarity in Metal–Oxide–Semiconductor Field Effect Transistors with High-k and SiO₂ Gate Dielectrics