2012 International Electron Devices Meeting 2012
DOI: 10.1109/iedm.2012.6479129
|View full text |Cite
|
Sign up to set email alerts
|

Impact of ultra low power and fast write operation of advanced perpendicular MTJ on power reduction for high-performance mobile CPU

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

0
52
0

Year Published

2013
2013
2023
2023

Publication Types

Select...
4
3
1

Relationship

1
7

Authors

Journals

citations
Cited by 79 publications
(52 citation statements)
references
References 5 publications
0
52
0
Order By: Relevance
“…22,31 We need new p-MTJs that switch rapidly with low current, high DE, and high TMR ratios. We recently succeeded in demonstrating 3-ns-pulse STT switching 32 at 50 lA in a sub-30-nm size p-MTJ (Figs. 4 and 5).…”
Section: A Fast and Low Power Stt Switching In P-mtjsmentioning
confidence: 99%
See 2 more Smart Citations
“…22,31 We need new p-MTJs that switch rapidly with low current, high DE, and high TMR ratios. We recently succeeded in demonstrating 3-ns-pulse STT switching 32 at 50 lA in a sub-30-nm size p-MTJ (Figs. 4 and 5).…”
Section: A Fast and Low Power Stt Switching In P-mtjsmentioning
confidence: 99%
“…All 172607 (2014) components of the core are made of transistors whose speed can be as fast as 1 ps and whose operation energy can be as low as 0.1 fJ to satisfy these requirements. Our p-MTJ 32,33 with 3 ns and 90 fJ is presently the most advanced available, and its performance can hopefully be improved by one order of magnitude in the future. Nevertheless, we still cannot deny that the active performance of STT-MRAMs is far inferior to that of volatile transistor circuits in the core.…”
Section: A Dilemma With Non-volatile Memoriesmentioning
confidence: 99%
See 1 more Smart Citation
“…1,2 Such memories show promise to eventually replace DRAM and even SRAM in microprocessors. 3 The efficiency of the write process for STT-MRAM is constrained by the magnetic damping parameter, which dictates the rate at which angular momentum can be exchanged between the spin system and the crystal lattice. Thus, the discovery of magnetic memory materials with the lowest possible damping has become a prime concern of STT-MRAM developers.…”
Section: Introductionmentioning
confidence: 99%
“…Consequently, the upper limit for MTJ voltage, or equivalently, the maximum achievable write-speed, is determined by the tunnel barrier reliability. One approach to address such reliability issues is to design the MTJ with lower critical switching current [1][2][3]5,6 . However, when switching current is lowered, the read current must also reduce in order to prevent disturbfailures (accidental write during read) 3,5,6 .…”
mentioning
confidence: 99%