Impact of the lateral source/drain abruptness on MOSFET characteristics and transport properties

Abstract

Phiiips Semiconduelom. 860 me Jenn Momel38920 Crolia, Fmnce,+33 (014 76 92 S6 49. d n w villnnrreun~~hil;"sco,,, 'STMicroeiectronics. 850 me J a n Monnel 38926 Croiles. France. AbstractThe impact of the lateral doping abruptness (LA) of the sonrce/drain extension still remains a polemic issue in CMOS transistor engineering. B ased o n dedicated simulations, i t is shown that the maximum gain in on current achieved with steep profiles does not exceed 3%. Moreover, a suited analytical modeling indicates that the influence of the LA mostly resides in changing the effective channel length (Leff). Subsequently, the impact of the gate overlap is critically reviewed and actually appears to be mostly related to the analytical definition of the simulated device. Eventually, relying on a clear physical background, the analysis is carried out further to investigate the modulation of source injection propetties in the framework of the backscattering theory and Monte Carlo (MC) simulations. We propose an additional injection effect that emerges at the source end potential barrier when the junction becomes very abrupt. This effect incorporated within the theory of Lundstrom enables further interpretation and understanding of the MC on-state current calculations. Simulations ResultsTo estimate the impact of the LA alone, we performed numerical simulations using a quantum drift-diffusion (QDD) approach based on the following assumptions: (i) the vertical abruptness, the junction depth Xj, the metallurgical length Lmet and the channel doping Nc were kept constant, (ii) the overlap with the gate was sufficient to prevent any "underlap" issues and (iii) only the lateral abruptness was varied. The doping profiles used and the way the LA was calculated are presented in Figure 1. Figure 2 shows the IodIoff trade-off given by simulations for different Lmet and LA ranging from 1 2 . l d d e c to l d d e c . For a given Lmet, decreasing the LA improves the Ion but also stronglydegrades the Ioff. Fora given Ioff value adjusted by changing Lmet along an abruptness trend line, a maximum gain of 3% is obtained with an extremely abrupt junction (LA=lnm/dec). Figure 3,4 and 5 present the dependence of the linear regime thresbold voltage Vt, of the DIBL and of the swing, respectively, as a function of the LA for different Lmet. A degradation of these parameters is observed for both the most abrupt and the most graded profiles, especially for the shortest Lmet. The latter case is due to a counter-doping of the channel by the tail of the extension as already mentioned in [l, 21. Figure 6 shows the potential barrier in the channel calculated for respectively L A = l d d e c , 5.4nm/dec & 7 . 7 d d e c . A decrease of the potential barrier is observed for the lowest LA that is related to the degradation of the Vt, DIBL and swing. This was initially explained by a change in the "effective Xj" with the LA [Z]. However, ID simulations (independent of the 2D profile) can reproduce exactly the same barrier lowering with the abruptness proving that the p...

Effects of High-$\kappa$ (HfO$_2$) Gate Dielectrics in Double-Gate and Cylindrical-Nanowire FETs Scaled to the Ultimate Technology Nodes

“…Source and drain are offset from the gate edges by 15 nm. This offset, which corresponds to roughly five standard deviations, may appear excessive if compared with typical values used in doped-channel MOSFETs [2], [17], [18], where a junction develops at the intersection of the donor and acceptor profiles. In our devices, instead, the channel is undoped and no junction is present; thus, we cannot afford having a donor concentration at the edge of the channel of the order of 10 cm or higher; otherwise, the device would be normally on and its threshold voltage would become overly sensitive to process variations.…”

Fabrication of 32 nm Vertical nMOSFETs with Asymmetric Graded Lightly Doped Drain Structure

“…However, it might degrade the device driving capability due to the large series resistance existing in the LDD regions. The improved drain engineering of the graded LDD ͑GLDD͒ structure has received more attention because the GLDD structure not only has a major impact on the device reliability and the extrinsic series resistance, [2][3][4][5][6] but can also affect the short-channel effects. 5,6 Compared with the conventional LDD structure, the GLDD structure can achieve a better hot carrier reliability due to the remarkably reduced peak electric field near the drain junction.…”

“…The improved drain engineering of the graded LDD ͑GLDD͒ structure has received more attention because the GLDD structure not only has a major impact on the device reliability and the extrinsic series resistance, [2][3][4][5][6] but can also affect the short-channel effects. 5,6 Compared with the conventional LDD structure, the GLDD structure can achieve a better hot carrier reliability due to the remarkably reduced peak electric field near the drain junction. [2][3][4] Meanwhile, the GLDD structure can provide a higher driving current for the lower source/drain ͑S/D͒ resistances.…”

“…Moreover, the GLDD structure can reduce the short-channel effects ͑SCEs͒ by increasing the potential barrier of the channel in the off state. 6 However, the planar GLDD structure is not easily realized, controlled, and measured, and a high source series resistance still exists for the symmetric fabrication. [2][3][4][5][6] In this article, we propose the asymmetric GLDD ͑AGLDD͒ structure in a vertical device with a 32 nm channel length which can combine the advantages of the asymmetric GLDD structure ͑GLDD region only on the drain side͒ and the vertical channel device.…”