Impact of the Hybrid Multilevel Modulation Strategy on the Semiconductors Power Losses

Zambra, Diorge Alex Báo; Rech, Cassiano; Pinheiro, J.R.

doi:10.1109/iecon.2006.348104

Cited by 5 publications

(5 citation statements)

References 10 publications

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“…2, where V 3 , V 2 and V 1 are the normalized amplitude of DC sources that supply each cell, Ψ 3 and Ψ 2 represents the comparison levels of cell 3 and 2, r 3 (t), r 2 (t) and r 1 (t), are the reference signals, v 3 (t), v 2 (t) and v 1 (t) are the output voltage of each cell and v out (t) is the output phase-to-neutral voltage. Comparison levels employed in the comparison were obtained in [10], to guarantee minimum power losses for the converter. When the amplitude modulation index is equal to 1 the comparison levels are Ψ 3 = 0 and Ψ 3 = 1.…”

Section: Nine-level Hybrid Asymmetric Invertermentioning

confidence: 99%

A comparative analysis between the symmetric and the hybrid asymmetric nine-level series connected H-bridge cells inverter

Zambra

Rech

Pinheiro

2007

2007 European Conference on Power Electronics and Applications

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This paper presents the comparison of two cascaded multilevel inverter, with phase-voltage of the nine levels and applied to drive an induction motor of 500kVA/4160V. Performance indexes used in hereinafter in the comparison are semiconductors power losses, total harmonic distortion and first order distortion factor. The comparisons are developed in three ways; in the first comparison the switching frequency is found. It guarantees that the converters present the same efficiency. In the second comparison the objective is finding the maximum switching frequency that it is gotten in each topology. Finally, in the third comparison, the efficiency which both systems present the same output filter is found.

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Section: Nine-level Hybrid Asymmetric Invertermentioning

confidence: 99%

A comparative analysis between the symmetric and the hybrid asymmetric nine-level series connected H-bridge cells inverter

Zambra

Rech

Pinheiro

2007

2007 European Conference on Power Electronics and Applications

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“…In [38] a 9-level, 3-stage, asymmetrical cascaded MLI has been controlled with a hybrid strategy; the high power cells have been operated at the fundamental frequency while the low power stage is controlled by high frequency PWM.…”

Section: Introductionmentioning

confidence: 99%

“…In this case PWM control can be considered as in [21], [26], [38]. In other studies, when the dc souring is selected to have a maximum number of levels PWM control is unsuitable as the high voltage stage will be subjected to a high switching frequency as in [13].…”

Section: Introductionmentioning

confidence: 99%

Dual Vector Control Strategy for a Three-Stage Hybrid Cascaded Multilevel Inverter

Kadir¹,

Mekhilef²,

Ping³

2010

Journal of Power Electronics

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This paper presents a voltage control algorithm for a hybrid multilevel inverter based on a staged-perception of the inverter voltage vector diagram. The algorithm is applied to control a three-stage eighteen-level hybrid inverter, which has been designed with a maximum number of symmetrical levels. The inverter has a two-level main stage built using a conventional six-switch inverter and medium-and low-voltage three-level stages constructed using cascaded H-bridge cells. The distinctive feature of the proposed algorithm is its ability to avoid the undesirable high switching frequency for high-and medium-voltage stages despite the fact that the inverter's dc sources voltages are selected to maximize the number of levels by state redundancy elimination. The high-and medium-voltage stages switching algorithms have been developed to assure fundamental switching frequency operation of the high voltage stage and not more than few times this frequency for the medium voltage stage. The low voltage stage is controlled using a SVPWM to achieve the reference voltage vector exactly and to set the order of the dominant harmonics. The inverter has been constructed and the control algorithm has been implemented. Test results show that the proposed algorithm achieves the desired features and all of the major hypotheses have been verified.

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“…In order to ensure that all transitions between adjacent voltage levels can be done through the low-voltage stage, only some state redundancy has to be included, and the maximum number of levels must be abandoned. Previous studies have either chosen to satisfy the modulation condition and, therefore, not to design the inverter with maximum number of levels; in this case, PWM control can be effectively considered as in [21], [26], [38], and [39]. Otherwise, when the dc sources selected to provide maximum number of levels, PWM control leads to high-voltage stage operating in high switching frequency as in [13] and [40].…”

mentioning

confidence: 99%

“…In [38], a nine-level three-stage asymmetrical cascaded MLI has been controlled with a hybrid strategy; the high-power cells have been operated at fundamental frequency, while the low power stage is controlled by high-frequency PWM. The hybrid PWM (HPWM) algorithm presented in [39] considered also the three-stage asymmetrical inverter with (1:2:6) dc voltage ratio to provide 19 levels.…”

mentioning

confidence: 99%

Novel Vector Control Method for Three-Stage Hybrid Cascaded Multilevel Inverter

Mekhilef

Kadir

2011

IEEE Trans. Ind. Electron.

120

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Impact of the Hybrid Multilevel Modulation Strategy on the Semiconductors Power Losses

Cited by 5 publications

References 10 publications

A comparative analysis between the symmetric and the hybrid asymmetric nine-level series connected H-bridge cells inverter

A comparative analysis between the symmetric and the hybrid asymmetric nine-level series connected H-bridge cells inverter

Dual Vector Control Strategy for a Three-Stage Hybrid Cascaded Multilevel Inverter

Novel Vector Control Method for Three-Stage Hybrid Cascaded Multilevel Inverter

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