Impact of test structure design on electromigration of metal interconnect

Guo, Qiang; Foo, Lo Keng; Xu, Zhiwei; Yao, Pei; Ping, Neo Soh

doi:10.1109/ipfa.1999.791301

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction1

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2009

2010

Publication Types

Select...

Article1

Other1

Relationship

Self Cite0

Independent2

Authors

Journals

Cited by 2 publications

(1 citation statement)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Many works have been carried out on the electromigration study of the copper interconnects [8][9][10][11][12]. However, almost all the works are either on a simple straight line or two level linevia structure, instead of the entire circuit.…”

Section: Introductionmentioning

confidence: 99%

Modeling the effect of barrier thickness and low-k dielectric on circuit reliability using 3D model

Tan

2010

Microelectronics Reliability

View full text Add to dashboard Cite

Section: Introductionmentioning

confidence: 99%

Modeling the effect of barrier thickness and low-k dielectric on circuit reliability using 3D model

Tan

2010

Microelectronics Reliability

View full text Add to dashboard Cite

3D circuit model for 3D IC reliability study

Tan

2009

EuroSimE 2009 - 10th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelect

View full text Add to dashboard Cite

3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities, Young modulus, poisson ratio etc. Also, the architectural of the 3D IC will also affect the current density, temperature and thermomechanical stress distributions in the IC.In view of the above-mentioned, the electricalthermal-mechanical modeling of integrated circuit can no longer be done with a simple 2D model. The distributions of the current density, temperature and stress are important in determining the reliability of an IC. In this work we demonstrate a method of converting 2D circuit layo~t into a 3D model. Simulations under real circuit operating condition are carried out using both Cadence (a circuit simulator) and ANSYS (finite element tool). Limiting our study to the electromigration failure, we compute the current density, temperature and stress distributions of the interconnect layers by considering the heat transfer and Joule heating, and the "weak spot" for electromigration is identified. Layout design can be modified based on the simulation results so as to enhance the 3D circuit interconnect reliability.

show abstract

Impact of test structure design on electromigration of metal interconnect

Cited by 2 publications

References 4 publications

Modeling the effect of barrier thickness and low-k dielectric on circuit reliability using 3D model

Modeling the effect of barrier thickness and low-k dielectric on circuit reliability using 3D model

3D circuit model for 3D IC reliability study

Contact Info

Product

Resources

About