3D circuit model for 3D IC reliability study

Abstract

3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities, Young modulus, poisson ratio etc. Also, the architectural of the 3D IC will also affect the current density, temperature and thermomechanical stress distributions in the IC.In view of the above-mentioned, the electricalthermal-mechanical modeling of integrated circuit can no longer be done with a simple 2D model. The distributions of the current density, temperature and stress are important in determining the reliability of an IC. In this work we demonstrate a method of converting 2D circuit layo~t into a 3D model. Simulations under real circuit operating condition are carried out using both Cadence (a circuit simulator) and ANSYS (finite element tool). Limiting our study to the electromigration failure, we compute the current density, temperature and stress distributions of the interconnect layers by considering the heat transfer and Joule heating, and the "weak spot" for electromigration is identified. Layout design can be modified based on the simulation results so as to enhance the 3D circuit interconnect reliability.

Effect of IC layout on the reliability of CMOS amplifiers

“…Due to the scale of the 3D model, we are only looking at the void initiation location, and hence microstructure and stress relaxation effect can be ignored. The detailed steps for constructing the 3D model from the 2D layout, the material properties, the setup for the electric-thermal-structural simulation, and the equations and the procedures for the calculation of the atomic flux and atomic flux divergence (AFD) can be found in our recent works [16,17].…”

“…[16][17][18], we expand our work with more significant layout modifications, such as the change in the finger number and the placement of the transistors. The layout that can most effectively enhance the circuit reliability is studied.…”

Reliability-constrained die stacking order in 3DICs under manufacturing variability

“…In particular, signal and power-delivery electromigration (EM) is now a dominant reliability constraint in current IC designs [22], [25]. Especially given the exponential dependence of EM lifetime on temperature, we will focus our discussion on EM reliability; however, in principle our methodology can apply to any (power-and temperature-dependent) IC reliability mechanism.…”

“…Since current density and temperature have a significant impact on IC reliability, reliability issues are especially important in the 3DIC context [22], [23].…”

Modeling the effect of barrier thickness and low-k dielectric on circuit reliability using 3D model

“…The impact of various driving forces on electromigration in a 3D circuit model under typical operating condition using both Cadence (a circuit simulator) and ANSYS (a finite element software) was analyzed in our earlier work [15,16]. The maximum atomic flux divergence (AFD), which determines the void formation location and the EM lifetime of inter-connections in a circuit [17,18] are derived based on the thermal-electric and structural-thermal simulation result.…”