Impact of Interface Layer Nitrogen Concentration on HfO[sub 2]∕Hf-Silicate/Poly-Si–Based MOSFET Performance

Abstract

We fabricated metal oxide semiconductor field effect transistor ͑MOSFETs͒ with 0.5-nm-thick Hf-silicate/HfO 2 gate dielectrics on SiON base layers of different nitrogen concentration and studied the effects of the nitrogen concentration on their electrical properties. The gate dielectrics were deposited by atomic layer deposition ͑ALD͒ technology using Hf͓N͑CH 3 ͒͑C 2 H 5 ͔͒ 4 and SiH͓N͑CH 3 ͒ 2 ͔ 3 precursors. O 3 was used as an oxidant. Rapid thermal annealing ͑RTA͒ in a NO ambient gave rise to a SiON layer with a nitrogen concentration of about 7 atom %. With a NH 3 + NO ambient, the nitrogen concentration increased to 16%. Ultrathin films with equivalent oxide thickness ͑EOT͒ of about 1.0 nm could be fabricated using Hf-silicate/HfO 2 gate stacks on base layers of SiON. The leakage current density of devices with SiON base layers was about 1 order of magnitude less than that with a SiO 2 base layer, and that increased about 100 times for every 0.4-nm decrease of EOT. The flatband voltage ͑V FB ͒ and the threshold ͑V th ͒ with SiON base layers were slightly lower than those with a SiO 2 base layer, which implies that positive charge is generated due to nitrogen at the interface. The effective mobility for devices with Hf-silicate/HfO 2 gate stacks on SiON base layers was less than those with a SiO 2 base layer due to the higher interface trap density ͑N it ͒. Moreover, increasing the nitrogen concentration in the base layer led to an increase in the interfacial trap density, thereby decreasing the effective mobility.For many years, silicon dioxide ͑SiO 2 ͒ films have been the gate dielectric in complementary metal oxide semiconductor ͑CMOS͒ devices. For a gate oxide thickness of less than 3.5 nm, direct tunneling current increases 100 times for every 0.4-0.5 nm decrease of thickness. 1,2 This high gate leakage current would increase standby power consumption. In order to reduce the leakage current by direct tunneling, the high-dielectric-constant ͑high-k͒ materials allow for an increase in the physical thickness to maintain a low equivalent oxide thickness. Among many high-k materials, Hf-based and its nitride films are good for low leakage current and high carrier mobility. Therefore, sputter and/or metallorganic chemical vapor deposition ͑MOCVD͒ methods are currently used for the high-k film formation. [3][4][5][6][7][8][9] Atomic layer deposition ͑ALD͒ technology is desirable for precise control of composition, film thickness, conformality, and uniformity among many high-k film deposition techniques. [10][11][12][13][14][15] Hafnium-tetrachloride ͑HfCl 4 ͒ and water ͑H 2 O͒ were widely used for ALD HfO 2 film formations. [10][11][12] Recently, there were reports using Hf-amide-type precursors such as Hf͓N͑CH 3 ͒͑C 2 H 5 ͔͒ 4 for ALD of HfO 2 or Hf-aluminate films to solve the problem of particle formation with HfCl 4 precursors. 13-15 Furthermore, when ALD HfO 2 films were deposited at low temperature ͑around 300°C͒ using Hf͓N͑CH 3 ͒ 2 ͔ 4 precursor and O 3 as the oxidant instead of H 2 O, those films conta...

Dependences of nitrogen incorporation behaviors on the crystallinity and phase distribution of atomic layer deposited Hf-silicate films with various Si concentrations

“…7,18,19 However, the J g of Hf-silicate film with a high C Si of 68% ͑low C N ͒ decreased because a proper ͑rather low͒ C N improves the interface and dielectric properties. 20,21 Therefore, the blue curved line corresponding to the films after PDN appears in the J g -CET plot. Figure 10͑b͒ shows the changes in the V FB and hysteresis values of the HfO 2 and Hf-silicate films with various C Si after PDA and PDN.…”

Impact of O[sub 3] Concentration on Ultrathin HfO[sub 2] Films Deposited on HF-Cleaned Silicon Using Atomic Layer Deposition with Hf[N(CH[sub 3])(C[sub 2]H[sub 5])][sub 4]

“…16,17 Furthermore, nitrogen incorporation in the interfacial layer is useful for reducing the equivalent oxide thickness ͑EOT͒ and a 0.7 nm thick SiON layer with a nitrogen concentration of about 7 atom % is formed by rapid thermal processing in an NO ambient above 750°C. 18 However, it is not useful for the SiON interfacial layer for the replacement metalgate transistors because the process temperature after the salicide film formation can be lowered to below 600°C to maintain the good characteristics of the metal/high-k gate transistors. Moreover, there were few papers about the relationship between the O 3 concentration ͑160-370 g/Nm 3 ͒ and the electrical properties for ALD HfO 2 gate dielectrics using Hf͓N͑CH 3 ͒ 2 ͔ 4 precursor.…”

Design of a Fan-Out Panel-Level SiC MOSFET Power Module Using Ant Colony Optimization-Back Propagation Neural Network

“…RDL is directly impacted by the heat because it is located directly below the SiC MOSFET chip. The thermal expansion coefficient of nano-silver and copper is different, which leads to interface stratification issues [29]. The thermal performance of nano-silver was much better than that of copper.…”