Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550)
DOI: 10.1109/hpca.2000.824336
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Impact of heterogeneity on DSM performance

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Cited by 14 publications
(13 citation statements)
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“…However, these algorithms have limited use in practice due to simplified and often unrealistic assumptions, such as a priori knowledge of task runtime and dependencies. Figueiredo and Fortes [10] studied heterogeneous distributed shared-memory (DSM) multiprocessors and proposed a static scheduling policy that uses processor performance ratios. This policy is similar to our asymmetry-aware load balancing algorithm, but different in that it performs only static assignments, whereas our algorithm performs dynamic load balancing.…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…However, these algorithms have limited use in practice due to simplified and often unrealistic assumptions, such as a priori knowledge of task runtime and dependencies. Figueiredo and Fortes [10] studied heterogeneous distributed shared-memory (DSM) multiprocessors and proposed a static scheduling policy that uses processor performance ratios. This policy is similar to our asymmetry-aware load balancing algorithm, but different in that it performs only static assignments, whereas our algorithm performs dynamic load balancing.…”
Section: Related Workmentioning
confidence: 99%
“…To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. SC07 November [10][11][12][13][14][15][16]2007, Reno, Nevada, USA Copyright 2007 ACM 978-1-59593-764-3/07/0011 ...$5.00. making scheduling decisions.…”
Section: Introductionmentioning
confidence: 99%
“…Menasce and Almeida [20] proposed the use of heterogeneous processors in supercomputers, with two different types of processors used to speed up the parallel and sequential portions of a computation. Figueiredo and Fortes [8] explored heterogeneous distributed-shared-memory multiprocessors with a few nodes with large caches designed for single-thread performance, and a larger number of nodes with smaller caches designed for multi-threaded parallelism. Morad et al [21] presented an analysis of why an asymmetric chip multiprocessor can achieve higher performance for a given area and power budget.…”
Section: Related Workmentioning
confidence: 99%
“…Traditional graph-based algorithms [4,27,28] are impractical due to assumptions such as a priori knowledge of task runtime and dependencies. Figueiredo and Fortes [10] studied heterogeneous distributed shared-memory multiprocessors and proposed an algorithm using processor performance ratios, similar to our CPU ratings. Their algorithm, however, is static and not suitable for OS scheduling.…”
Section: Related Workmentioning
confidence: 99%