Operating system support for overlapping-ISA heterogeneous multi-core architectures

Li, Tong; Brett, Paul; Knauerhase, Rob; Koufaty, David; Reddy, Dheeraj; Hahn, Scott

doi:10.1109/hpca.2010.5416660

Cited by 28 publications

(27 citation statements)

References 28 publications

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“…[2009], Li et al [2007Li et al [ , 2010, Shelepov et al [2009], Srinivasan et al [2011], andVan Craeynest et al [2012]). In recent work, Van Craeynest et al [2013] propose fairnessaware scheduling for multithreaded (native) applications.…”

Section: Scheduling On Heterogeneous Multicoresmentioning

confidence: 99%

“…A significant body of recent work emphasizes the importance of scheduling on single-ISA heterogeneous multicores [Becchi and Crowley 2006;Chen and John 2009;Ghiasi et al 2005;Lakshminarayana et al 2009;Li et al 2007Li et al , 2010Shelepov et al 2009;Srinivasan et al 2011;Van Craeynest et al 2012, 2013. However, managed runtime environments include several service threads, such as garbage collection, that run for a significant fraction of the execution time [Cao et al 2012;Du Bois et al 2013b] and should be treated differently than application threads, according to recent research [Cao et al 2012;Heil and Smith 2000;Hu and John 2006;Maas et al 2012;Sartor and Eeckhout 2012].…”

Section: Introductionmentioning

confidence: 99%

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Boosting the Priority of Garbage

Akram

Sartor

Craeynest

et al. 2016

ACM Trans. Archit. Code Optim.

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While hardware is evolving toward heterogeneous multicore architectures, modern software applications are increasingly written in managed languages. Heterogeneity was born of a need to improve energy efficiency; however, we want the performance of our applications not to suffer from limited resources. How best to schedule managed language applications on a mix of big, out-of-order cores and small, in-order cores is an open question, complicated by the host of service threads that perform key tasks such as memory management. These service threads compete with the application for core and memory resources, and garbage collection (GC) must sometimes suspend the application if there is not enough memory available for allocation.In this article, we explore concurrent garbage collection's behavior, particularly when it becomes critical, and how to schedule it on a heterogeneous system to optimize application performance. While some applications see no difference in performance when GC threads are run on big versus small cores, others-those with GC criticality-see up to an 18% performance improvement. We develop a new, adaptive scheduling algorithm that responds to GC criticality signals from the managed runtime, giving more big-core cycles to the concurrent collector when it is under pressure and in danger of suspending the application. Our experimental results show that our GC-criticality-aware scheduler is robust across a range of heterogeneous architectures with different core counts and frequency scaling and across heap sizes. Our algorithm is performance and energy neutral for GC-uncritical Java applications and significantly speeds up GC-critical applications by 16%, on average, while being 20% more energy efficient for a heterogeneous multicore with three big cores and one small core.

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Section: Scheduling On Heterogeneous Multicoresmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Boosting the Priority of Garbage

Akram

Sartor

Craeynest

et al. 2016

ACM Trans. Archit. Code Optim.

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“…Several recent publications describe operating system scheduling algorithms for improving performance on AMP hardware [9], [10], [11], [12], [13], but the combination of AMP and VM services is unique to our work. Some work has however focused on architecture specialization for the VM workload.…”

Section: Related Workmentioning

confidence: 99%

“…Consequently, large companies purchase computers with the best performance per energy (PPE) dollar, rather than the best absolute performance [3], and the Japanese Green IT Council promotes PPE as a world standard metric for data center efficiency [4]. To lower power and improve PPE, architects are turning to customization and heterogeneity [5], [6], [7], [8], [9], [10], [11], [12]. Customized hardware for a specific function is well known to provide orders of magnitude improvements in performance, power, or both, but offers This research was supported by ARC DP0666059, NSF CSR-0917191, the 863 program of China 2012AA010905, and the National Natural Science Foundation of China 61070037, 61103016. a daunting programming task and the resulting software is generally not portable.…”

Section: Introductionmentioning

confidence: 99%

“…AMP combines general-purpose big (fast, high power) cores and small (slow, low power) cores [12], [13]. Vendors such as ARM, Qualcomm, Texas Instruments, and Intel are building AMP systems already [5], [9], [10], [14]. By assigning the critical path to the big core and other execution to the small core, prior research shows how to improve performance, and consequently energy, on these architectures [9], [10], [11], [12], [13].…”

Section: Introductionmentioning

confidence: 99%

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The yin and yang of power and performance for asymmetric hardware and managed software

Cao

Blackburn

Gao

et al. 2012

SIGARCH Comput. Archit. News

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Abstract-On the hardware side, asymmetric multicore processors present software with the challenge and opportunity of optimizing in two dimensions: performance and power. Asymmetric multicore processors (AMP) combine general-purpose big (fast, high power) cores and small (slow, low power) cores to meet power constraints. Realizing their energy efficiency opportunity requires workloads with differentiated performance and power characteristics.On the software side, managed workloads written in languages such as C#, Java, JavaScript, and PHP are ubiquitous. Managed languages abstract over hardware using Virtual Machine (VM) services (garbage collection, interpretation, and/or justin-time compilation) that together impose substantial energy and performance costs, ranging from 10% to over 80%. We show that these services manifest a differentiated performance and power workload. To differing degrees, they are parallel, asynchronous, communicate infrequently, and are not on the application's critical path.We identify a synergy between AMP and VM services that we exploit to attack the 40% average energy overhead due to VM services. Using measurements and very conservative models, we show that adding small cores tailored for VM services should deliver, at least, improvements in performance of 13%, energy of 7%, and performance per energy of 22%. The yin of VM services is overhead, but it meets the yang of small cores on an AMP. The yin of AMP is exposed hardware complexity, but it meets the yang of abstraction in managed languages. VM services fulfill the AMP requirement for an asynchronous, non-critical, differentiated, parallel, and ubiquitous workload to deliver energy efficiency. Generalizing this approach beyond system software to applications will require substantially more software and hardware investment, but these results show the potential energy efficiency gains are significant.

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Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake

Bilbao

Sáez

Prieto-Matías

2023

Concurrency and Computation

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SummaryAsymmetric multicore processors (AMPs) couple high‐performance big cores and power‐efficient small ones, all exposing a shared instruction set architecture to software, but with different microarchitectural features. The energy efficiency benefits of AMPs, together with the general‐purpose nature of the various cores, have led hardware manufacturers to build commercial AMP‐based products, first for the mobile and embedded domains, and more recently, for the desktop market segment, as with the Intel Alder Lake processor family. This trend indicates that AMPs may become a solid and more energy efficient replacement for symmetric multicores in a wide range of application domains. Previous research has demonstrated that the system software can substantially improve scheduling—critical to get the most out of heterogeneous cores—by leveraging hardware facilities that are directly managed by the OS, such as performance monitoring counters, or the recently introduced Intel Thread Director technology. Unfortunately, the OS‐level support enabling access to these hardware facilities may often take a long time to be adopted in operating systems, or may come in forms that make its utilization challenging from specific levels of the system software stack, especially in production systems. To fill this gap, we propose PMCSched, an open‐source framework enabling rapid development and evaluation of custom scheduling‐related support in the Linux kernel. PMCSched greatly simplifies the design and implementation of a wide range of scheduling policies for multicore systems that operate at different system software layers without requiring to patch the kernel. To demonstrate the potential of our framework, we conduct a set of experimental case studies on asymmetry‐aware scheduling for Intel Alder Lake processors.

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Operating system support for overlapping-ISA heterogeneous multi-core architectures

Abstract: Abstract

Cited by 28 publications

References 28 publications

Boosting the Priority of Garbage

Boosting the Priority of Garbage

The yin and yang of power and performance for asymmetric hardware and managed software

Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake

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