Impact of Charge Trapping On Epitaxial p-Ge-on-p-Si and HfO2 Based Al/HfO2/p-Ge-on-p-Si/Al Structures Using Kelvin Probe Force Microscopy and Constant Voltage Stress

Choudhary, Sumit; Schwarz, Daniel; Funk, Hannes S.; Khosla, Robin; Sharma, Satinder K.; Schulze, Jörg

doi:10.1109/tnano.2021.3069820

Cited by 13 publications

(3 citation statements)

References 63 publications

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“…This technique enables the direct measurement of both surface potential and work functions, providing valuable insights into the charge trapping and detrapping behavior within the material. Choudhary et al demonstrated the application of KPFM for analyzing the quality of oxide and semiconductor interfaces through charge trapping studies . Building on their work, we utilized KPFM to investigate the time-dependent decay of the contact potential difference (CPD) in spiral WSe 2 .…”

Section: Resultsmentioning

confidence: 99%

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Naik,

Choudhary,

Sharma

et al. 2024

ACS Appl. Electron. Mater.

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Two-dimensional transition metal dichalcogenide (2D-TMDC) layered materials have shown great potential in emerging memristor technologies for neuromorphic computing applications. Often, most of the stoichiometric TMDC materials do not show any memristor hysteresis, and modulation of structural defects and compositional variations are much needed to promote the memristor characteristics. Herein, we investigate a multilayer WSe 2 with spiral topology and twisted interface for memristor switching device applications. We explore a twisted multilayered WSe 2 memristor device and its potential application as a synaptic candidate for neuromorphic computing applications. The fabricated device reports cyclic stability over 200 cycles and data retention of 10 3 s. We also discuss the conduction mechanism using edge and terrace defects across the interfaces of the twisted layers. These results provide a wide range of possibilities for improving the memristor switching behavior and will help us utilize twisted flakes for emerging neuromorphic device applications.

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Section: Resultsmentioning

confidence: 99%

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Naik,

Choudhary,

Sharma

et al. 2024

ACS Appl. Electron. Mater.

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“…However, the κ value is consistent at ∼1.9 in the range of 100 to 500 kHz, and the κ value <2.5 was measured overall. The variability of the κ value is attributed to the intrinsic (dielectric relaxation) and extrinsic (parasitic effects) causes. , As evident from the literature, Sn–CT can be considered among those which are known as an efficient low-κ dielectric gap-filling material for device interconnect applications (Figure S12).…”

Section: Resultsmentioning

confidence: 99%

Induced Chemical Networking of Organometallic Tin in a Cyclic Framework for Sub-10 nm Patterning and Interconnect Application

Nandi

Khillare

Kumar

et al. 2023

ACS Appl. Nano Mater.

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Given the need for advanced resist materials in view of fast shrinkage of semiconductor node scaling, this work demonstrates the lithography application of an organotin-based cyclotrimeric species (Sn−CT) as a molecular resist for sub-10 nm patterning using electron beam lithography (EBL) and helium ion beam lithography (HIBL) techniques. While the resist has been successfully used for patterning ∼15 nm line/space features and ∼9 nm discrete line features at a dose of 2.5 mC/cm 2 using EBL, ∼15 nm line/space features were printed on silicon at a dose of 16 μC/cm 2 using HIBL. Moreover, Sn−CT has also been used for patterning complex features at a single nanometer regime such as real-scale device designs at ∼7 nm structure on silicon. A mechanistic study using X-ray photoelectron spectroscopy (XPS) revealed the formation of Sn−O−Sn and Sn−OH networks along with the loss of carbon-based group(s) upon radiation exposure, resulting in the generation of insoluble products in the exposed region, which becomes the basis of polarity switching and hence pattern development. The resist was found to have good etch resistance with respect to silicon. Moreover, Sn−CT has been explored as a good gap-filling material for silicon (Si) front-end devices and interconnects due to its low-κ dielectric (∼1.9) and high diffusion barrier properties.

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“…Further, the reliability of Ti/HfO 2 /Al 2 O 3 /Ge CP-DGTFET was investigated with deviation in ITC from ±10 10 cm −2 to ±10 12 cm −2 . The ITCs are assumed to be uniformly distributed at the Al 2 O 3 /Ge interface based on experimental reports [42][43][44]. In addition, the effect of temperature variation on the Ti/HfO 2 /Al 2 O 3 /Ge CP-DGTFET device structure's performance was inspected in the presence of ±10 12 cm −2 ITCs.…”

Section: Device Structure and Methodologymentioning

confidence: 99%

Performance and reliability assessment of source work function engineered charge plasma based Ti/HfO₂/Al₂O₃/Ge, double gate TFET

Yadav,

Chappa,

Baghel

et al. 2024

Eng. Res. Express

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The Tunnel Field Effect Transistor (TFET) often suffers from low ON current (ION), charge traps, and thermal variability, which limits its performance and reliability. To address these issues, the source work function engineered Ge Charge Plasma Double Gate Tunnel Field Effect Transistor (CP-DGTFET) device structure with HfO2/Al2O3 bilayer gate dielectric is designed and investigated using numerical TCAD simulations. The proposed Ti/HfO2/Al2O3/Ge CP-DGTFET device structure showed excellent DC characteristics with exceptional ION, ION/IOFF ratio, and minimal sub-threshold swing (S) of ~3.04×10-4 A/µm, ~1.2×1010, and ~3.4 mV/dec, respectively. Furthermore, the device’s analog characteristics displayed good transconductance, cut-off frequency, and gain bandwidth product of ~0.75 mS/µm, ~0.97 THz, and ~0.10 THz, respectively. Moreover, the charge trap exploration divulges that positive ITCs can enhance device performance, whereas negative ITCs can adversely impact the electrical characteristics of CP-DGTFET. Additionally, the temperature-dependent analysis showed that the OFF-state leakage current increases from ~1.7×10-15 A/µm to 2.4×10-10 A/µm with temperature fluctuations from 275 K to 375 K. Overall, the work function-engineered CP-based Ti/HfO2/Al2O3/Ge DGTFET device structure shows great potential for improving the performance and reliability of Ge TFET technology.

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Impact of Charge Trapping On Epitaxial p-Ge_-on-p-Si and HfO₂ Based Al/HfO₂/p-Ge_-on-p-Si/Al Structures Using Kelvin Probe Force Microscopy and Constant Voltage Stress

Cited by 13 publications

References 63 publications

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Induced Chemical Networking of Organometallic Tin in a Cyclic Framework for Sub-10 nm Patterning and Interconnect Application

Performance and reliability assessment of source work function engineered charge plasma based Ti/HfO₂/Al₂O₃/Ge, double gate TFET

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Impact of Charge Trapping On Epitaxial p-Ge-on-p-Si and HfO2 Based Al/HfO2/p-Ge-on-p-Si/Al Structures Using Kelvin Probe Force Microscopy and Constant Voltage Stress

Cited by 13 publications

References 63 publications

Spiral WSe2 with Interlayer Twist for Memristive and Neuromorphic Device Applications

Spiral WSe2 with Interlayer Twist for Memristive and Neuromorphic Device Applications

Induced Chemical Networking of Organometallic Tin in a Cyclic Framework for Sub-10 nm Patterning and Interconnect Application

Performance and reliability assessment of source work function engineered charge plasma based Ti/HfO2/Al2O3/Ge, double gate TFET

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Product

Resources

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Impact of Charge Trapping On Epitaxial p-Ge_-on-p-Si and HfO₂ Based Al/HfO₂/p-Ge_-on-p-Si/Al Structures Using Kelvin Probe Force Microscopy and Constant Voltage Stress

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Spiral WSe₂ with Interlayer Twist for Memristive and Neuromorphic Device Applications

Performance and reliability assessment of source work function engineered charge plasma based Ti/HfO₂/Al₂O₃/Ge, double gate TFET