IMAGING ANALYSIS OF THE HARD X-RAY TELESCOPE ProtoEXIST2 AND NEW TECHNIQUES FOR HIGH-RESOLUTION CODED-APERTURE TELESCOPES

Grindlay

et al. 2021

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Application-specific integrated circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space-qualified technique of making interconnections between ASICs and their substrate packaging board for power, control, and readout of the ASICs. Wire bonding is nearly ubiquitous in modern space programs, but their exposed wires can be prone to damage during assembly and subject to electric interference during operations. Additional space around the ASICs needed for wire bonding also impedes efficient packaging of large arrays of detectors. Here, we introduce the through silicon vias (TSV) technology that replaces wire bonds and eliminates their shortcomings. We have successfully demonstrated the feasibility of implementing TSVs to existing ASIC wafers (a.k.a. a via-last process) developed for processing the x-ray signals from the x-ray imaging CdZnTe detectors on the Nuclear Spectroscopic Telescope Array small explorer telescope mission that was launched in 2012. While TSVs are common in the semiconductor industry, this is the first (to our knowledge) successful application for astrophysics imaging instrumentation. We expect that the TSV technology will simplify the detector assembly and thus will enable significant cost and schedule savings in assembly of large area CdZnTe detectors.

Section: Introductionmentioning

confidence: 99%

Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors

Grindlay

et al. 2021

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“…The HSEE draws on technology studied for large-area CZT arrays for the EXIST telescope proposed for Astro2010 4 and initially developed with the ProtoEXIST 1 and 2 balloon-borne x-ray telescope experiments 5 – 9 The HSEE detector plane will be composed of a closely tiled array of 19.9×19.9 mm2, 3-mm-thick pixelated CZT detectors, each read out by an application specific integrated circuit (ASIC) originally developed 10 – 12 for the nuclear spectroscopic telescope array (NuSTAR) mission 13 . The electrical connection of each of the individual CZT pixels (0.55×0.55 mm2 pixel active area) to the system for readout is completed with conductive-epoxy bonds to gold studs attached to a matching pattern of input pads (32×32 pads, 0.6-mm pitch) on the upper surface of the NuSTAR ASIC (NuASIC).…”

Section: Introductionmentioning

confidence: 99%

Tuning of nuclear spectroscopic telescope array application specific integrated circuits to improve low energy threshold of future hard x-ray imaging detectors

Violette

et al. 2023

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.Detector commanding, processing and readout of spaceborne instrumentation is often accomplished with application specific integrated circuits (ASICs). The ASIC designed for the nuclear spectroscopic telescope array (NuSTAR) mission enables future tiled CdZnTe (CZT) detector array readout for x-ray detectors, such as the high resolution energetic x-ray imager (HREXI). Modified NuSTAR ASIC (NuASIC) gain settings have been implemented for HREXI’s broader targeted imaging energy range (3 to 300 keV) compared with NuSTAR (2 to 79 keV), which may require updated NuASIC internal parameters for optimal energy resolution. To reach HREXI’s targeted low energy threshold, we have also enabled the NuASIC’s “charge pump mode,” which introduces an additional tuning parameter. We describe the mechanics of the NuASIC’s adjustable parameters and use our recently developed ASIC test stand to probe a “bare” NuASIC using its internal test pulser. We record the effects of parameter tuning on the device’s electronics noise and low energy threshold and report the optimal set of parameters for HREXI’s updated gain setting. We detail a semiautomated procedure to derive the optimal parameters for each of HREXI’s large area closely tiled NuASIC/CZT detectors to expedite instrument integration.

“…HREXI is a CdZnTe (CZT) imaging hard x-ray (3 to 300 keV) detector designed to identify and localize transient astrophysical events. Drawing on heritage technology developed during the ProtoEXIST 1 & 2 balloon-borne x-ray telescope experiments, [1][2][3][4] HREXI is composed of a modular array of 256 closely tiled pixellated 19.9 × 19.9 mm 2 , 3-mm-thick CZT detectors. Each CZT detector, with an example shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

Testing station for fast screening of through silicon via-enabled application-specific integrated circuits for hard x-ray imaging detectors

Violette

et al. 2022

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Application-specific integrated circuits (ASICs) are used in space-borne instruments for signal processing and detector readout. The electrical interface of these ASICs to frontend printed circuit boards is commonly accomplished with wire bonds. Through silicon via (TSV) technology has been proposed as an alternative interconnect technique that will reduce assembly complexity of ASIC packaging by replacing wire bonding with flip-chip bonding. TSV technology is advantageous in large detector arrays where TSVs enable close detector tiling on all sides. Wafer-level probe card testing of TSV ASICs is frustrated by solder balls introduced onto the ASIC surface for flip-chip bonding that hamper alignment. Therefore, we developed the ASIC test stand (ATS) to enable rapid screening and characterization of individual ASIC die. We successfully demonstrated ATS operation on ASICs originally developed for CdZnTe detectors on the Nuclear Spectroscopic and Telescope Array (NuSTAR) mission that were later modified with TSVs in a via-last process. We tested both backside blind-TSVs and frontside through-TSVs, with results from internal test pulser measurements that demonstrate performance equal to or exceeding the probe card wafer-level testing data. The ATS can easily be expanded or duplicated to parallelize ASIC screening for large area imaging detectors of future space programs.